Lines Matching refs:Op
274 const MCOperand &Op = MI->getOperand(OpNo);
275 if (Op.isReg()) {
276 unsigned Reg = Op.getReg();
278 } else if (Op.isImm()) {
279 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << markup(">");
281 assert(Op.isExpr() && "unknown operand kind in printOperand");
282 const MCExpr *Expr = Op.getExpr();
379 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
382 const MCOperand &MO1 = MI->getOperand(Op);
383 const MCOperand &MO2 = MI->getOperand(Op + 1);
384 const MCOperand &MO3 = MI->getOperand(Op + 2);
408 void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op,
411 const MCOperand &MO1 = MI->getOperand(Op);
412 const MCOperand &MO2 = MI->getOperand(Op + 1);
420 void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op,
423 const MCOperand &MO1 = MI->getOperand(Op);
424 const MCOperand &MO2 = MI->getOperand(Op + 1);
432 void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,
435 const MCOperand &MO1 = MI->getOperand(Op);
438 printOperand(MI, Op, STI, O);
443 const MCOperand &MO3 = MI->getOperand(Op + 2);
445 assert(IdxMode != ARMII::IndexModePost && "Should be pre or offset index op");
448 printAM2PreOrOffsetIndexOp(MI, Op, STI, O);
477 void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
480 const MCOperand &MO1 = MI->getOperand(Op);
481 const MCOperand &MO2 = MI->getOperand(Op + 1);
482 const MCOperand &MO3 = MI->getOperand(Op + 2);
494 // If the op is sub we have to print the immediate even if it is 0
496 ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm());
498 if (AlwaysPrintImm0 || ImmOffs || (op == ARM_AM::sub)) {
499 O << ", " << markup("<imm:") << "#" << ARM_AM::getAddrOpcStr(op) << ImmOffs
506 void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,
509 const MCOperand &MO1 = MI->getOperand(Op);
511 printOperand(MI, Op, STI, O);
515 assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) !=
518 printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0);
592 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm());
593 if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM::sub) {
594 O << ", " << markup("<imm:") << "#" << ARM_AM::getAddrOpcStr(Op)
616 unsigned Op = ARM_AM::getAM5FP16Op(MO2.getImm());
617 if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM::sub) {
750 const MCOperand &Op = MI->getOperand(OpNum);
751 if (Op.getImm())
759 const MCOperand &Op = MI->getOperand(OpNum);
760 O << ARM_PROC::IModToString(Op.getImm());
765 const MCOperand &Op = MI->getOperand(OpNum);
766 unsigned IFlags = Op.getImm();
778 const MCOperand &Op = MI->getOperand(OpNum);
779 unsigned SpecRegRBit = Op.getImm() >> 4;
780 unsigned Mask = Op.getImm() & 0xf;
784 unsigned SYSm = Op.getImm();
1126 void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op,
1129 const MCOperand &MO1 = MI->getOperand(Op);
1130 const MCOperand &MO2 = MI->getOperand(Op + 1);
1133 printOperand(MI, Op, STI, O);
1147 unsigned Op,
1151 const MCOperand &MO1 = MI->getOperand(Op);
1152 const MCOperand &MO2 = MI->getOperand(Op + 1);
1155 printOperand(MI, Op, STI, O);
1169 unsigned Op,
1172 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 1);
1176 unsigned Op,
1179 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 2);
1183 unsigned Op,
1186 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4);
1189 void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op,
1192 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4);
1408 MCOperand Op = MI->getOperand(OpNum);
1411 if (Op.isExpr())
1414 unsigned Bits = Op.getImm() & 0xFF;
1415 unsigned Rot = (Op.getImm() & 0xF00) >> 7;
1430 if (ARM_AM::getSOImmVal(Rotated) == Op.getImm()) {
