Lines Matching refs:VR1
201 bool operator() (unsigned VR1, unsigned VR2) const {
202 return operator[](VR1) < operator[](VR2);
277 bool operator() (unsigned VR1, unsigned VR2) const;
293 bool operator() (unsigned VR1, unsigned VR2) const;
303 bool RegisterCellLexCompare::operator() (unsigned VR1, unsigned VR2) const {
313 if (VR1 == VR2)
316 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2);
327 return BitOrd.BaseOrd[VR1] < BitOrd.BaseOrd[VR2];
331 bool RegisterCellBitCompareSel::operator() (unsigned VR1, unsigned VR2) const {
332 if (VR1 == VR2)
334 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1);
337 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN;
339 // If Bit1 exceeds the width of VR1, then:
346 // If Bit1 is within VR1, but Bit2 is not within VR2, return false.
