Lines Matching refs:Op
521 HexagonTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG)
919 bool HexagonTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
942 bool isLegal = getIndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset,
957 HexagonTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
958 SDNode *Node = Op.getNode();
1003 return Op;
1009 SDValue HexagonTargetLowering::LowerPREFETCH(SDValue Op,
1011 SDValue Chain = Op.getOperand(0);
1012 SDValue Addr = Op.getOperand(1);
1015 SDLoc DL(Op);
1020 SDValue HexagonTargetLowering::LowerINTRINSIC_VOID(SDValue Op,
1022 SDValue Chain = Op.getOperand(0);
1023 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
1026 SDValue Addr = Op.getOperand(2);
1027 SDLoc DL(Op);
1035 HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
1037 SDValue Chain = Op.getOperand(0);
1038 SDValue Size = Op.getOperand(1);
1039 SDValue Align = Op.getOperand(2);
1040 SDLoc dl(Op);
1061 DAG.ReplaceAllUsesOfValueWith(Op, AA);
1206 HexagonTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
1212 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
1213 return DAG.getStore(Op.getOperand(0), SDLoc(Op), Addr,
1214 Op.getOperand(1), MachinePointerInfo(SV), false,
1241 SDValue HexagonTargetLowering::LowerCTPOP(SDValue Op, SelectionDAG &DAG) const {
1242 SDLoc dl(Op);
1243 SDValue InpVal = Op.getOperand(0);
1252 SDValue HexagonTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
1253 SDLoc dl(Op);
1255 SDValue LHS = Op.getOperand(0);
1256 SDValue RHS = Op.getOperand(1);
1257 SDValue Cmp = Op.getOperand(2);
1260 EVT VT = Op.getValueType();
1276 return Op;
1288 return DAG.getNode(ISD::SETCC, dl, Op.getValueType(),
1289 LHS, RHS, Op.getOperand(2));
1294 return DAG.getNode(ISD::SETCC, dl, Op.getValueType(),
1295 LHS, RHS, Op.getOperand(2));
1302 HexagonTargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
1303 SDValue PredOp = Op.getOperand(0);
1304 SDValue Op1 = Op.getOperand(1), Op2 = Op.getOperand(2);
1306 SDLoc DL(Op);
1320 SDValue HexagonTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
1321 EVT VT = Op.getValueType();
1322 SDLoc DL(Op);
1323 LoadSDNode *LoadNode = cast<LoadSDNode>(Op);
1325 SDValue Ptr = Op.getOperand(1);
1406 HexagonTargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {
1407 EVT ValTy = Op.getValueType();
1408 ConstantPoolSDNode *CPN = cast<ConstantPoolSDNode>(Op);
1419 return DAG.getNode(HexagonISD::AT_PCREL, SDLoc(Op), ValTy, T);
1420 return DAG.getNode(HexagonISD::CP, SDLoc(Op), ValTy, T);
1424 HexagonTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
1425 EVT VT = Op.getValueType();
1426 int Idx = cast<JumpTableSDNode>(Op)->getIndex();
1429 return DAG.getNode(HexagonISD::AT_PCREL, SDLoc(Op), VT, T);
1433 return DAG.getNode(HexagonISD::JT, SDLoc(Op), VT, T);
1437 HexagonTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const {
1443 if (verifyReturnAddressArgumentIsConstant(Op, DAG))
1446 EVT VT = Op.getValueType();
1447 SDLoc dl(Op);
1448 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1450 SDValue FrameAddr = LowerFRAMEADDR(Op, DAG);
1463 HexagonTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
1468 EVT VT = Op.getValueType();
1469 SDLoc dl(Op);
1470 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1481 HexagonTargetLowering::LowerATOMIC_FENCE(SDValue Op, SelectionDAG& DAG) const {
1482 SDLoc dl(Op);
1483 return DAG.getNode(HexagonISD::BARRIER, dl, MVT::Other, Op.getOperand(0));
1488 HexagonTargetLowering::LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const {
1489 SDLoc dl(Op);
1490 auto *GAN = cast<GlobalAddressSDNode>(Op);
1521 HexagonTargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
1522 const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
1523 SDLoc dl(Op);
1537 HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG)
1542 return DAG.getNode(HexagonISD::AT_PCREL, SDLoc(Op), PtrVT, GOTSym);
1681 HexagonTargetLowering::LowerGlobalTLSAddress(SDValue Op,
1683 GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
2278 static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
2279 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
2280 SDValue V1 = Op.getOperand(0);
2281 SDValue V2 = Op.getOperand(1);
2282 SDLoc dl(Op);
2283 EVT VT = Op.getValueType();
2338 static SDValue LowerVECTOR_SHIFT(SDValue Op, SelectionDAG &DAG) {
2340 SDValue V1 = Op.getOperand(0);
2341 SDValue V2 = Op.getOperand(1);
2343 SDLoc dl(Op);
2344 EVT VT = Op.getValueType();
2359 switch (Op.getOpcode()) {
2373 switch (Op.getOpcode()) {
2394 HexagonTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
2395 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode());
2396 SDLoc dl(Op);
2397 EVT VT = Op.getValueType();
2532 HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op,
2534 SDLoc dl(Op);
2536 EVT VT = Op.getValueType();
2537 unsigned NElts = Op.getNumOperands();
2538 SDValue Vec0 = Op.getOperand(0);
2547 return DAG.getNode(HexagonISD::COMBINE, dl, VT, Op.getOperand(1), Vec0);
2552 SDValue Vec1 = Op.getOperand(1);
2574 SDValue OpN = Op.getOperand(N);
2593 HexagonTargetLowering::LowerEXTRACT_VECTOR(SDValue Op,
2595 EVT VT = Op.getValueType();
2597 SDLoc dl(Op);
2598 SDValue Idx = Op.getOperand(1);
2599 SDValue Vec = Op.getOperand(0);
2603 SDValue Width = DAG.getConstant(Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT ?
2667 HexagonTargetLowering::LowerINSERT_VECTOR(SDValue Op,
2669 EVT VT = Op.getValueType();
2671 SDLoc dl(Op);
2672 SDValue Vec = Op.getOperand(0);
2673 SDValue Val = Op.getOperand(1);
2674 SDValue Idx = Op.getOperand(2);
2678 SDValue Width = DAG.getConstant(Op.getOpcode() == ISD::INSERT_VECTOR_ELT ?
2732 HexagonTargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
2733 SDValue Chain = Op.getOperand(0);
2734 SDValue Offset = Op.getOperand(1);
2735 SDValue Handler = Op.getOperand(2);
2736 SDLoc dl(Op);
2760 HexagonTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
2761 unsigned Opc = Op.getOpcode();
2765 Op.getNode()->dumpr(&DAG);
2770 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG);
2771 case ISD::INSERT_SUBVECTOR: return LowerINSERT_VECTOR(Op, DAG);
2772 case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR(Op, DAG);
2773 case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_VECTOR(Op, DAG);
2774 case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR(Op, DAG);
2775 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
2776 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG);
2779 case ISD::SRL: return LowerVECTOR_SHIFT(Op, DAG);
2780 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
2781 case ISD::JumpTable: return LowerJumpTable(Op, DAG);
2782 case ISD::EH_RETURN: return LowerEH_RETURN(Op, DAG);
2784 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG);
2785 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
2786 case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
2787 case ISD::ATOMIC_FENCE: return LowerATOMIC_FENCE(Op, DAG);
2788 case ISD::GlobalAddress: return LowerGLOBALADDRESS(Op, DAG);
2789 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
2790 case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG);
2791 case ISD::VASTART: return LowerVASTART(Op, DAG);
2793 case ISD::LOAD: return LowerLOAD(Op, DAG);
2794 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG);
2795 case ISD::SETCC: return LowerSETCC(Op, DAG);
2796 case ISD::VSELECT: return LowerVSELECT(Op, DAG);
2797 case ISD::CTPOP: return LowerCTPOP(Op, DAG);
2798 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
2799 case ISD::INTRINSIC_VOID: return LowerINTRINSIC_VOID(Op, DAG);
2800 case ISD::INLINEASM: return LowerINLINEASM(Op, DAG);
2801 case ISD::PREFETCH: return LowerPREFETCH(Op, DAG);
