Lines Matching refs:Op
154 void AddBusyRegs(const X86Operand &Op) {
155 AddBusyReg(Op.getMemBaseReg());
156 AddBusyReg(Op.getMemIndexReg());
210 virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
214 virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
222 void InstrumentMemOperand(X86Operand &Op, unsigned AccessSize, bool IsWrite,
236 void EmitLEA(X86Operand &Op, unsigned Size, unsigned Reg, MCStreamer &Out) {
241 Op.addMemOperands(Inst, 5);
245 void ComputeMemOperandAddress(X86Operand &Op, unsigned Size,
251 std::unique_ptr<X86Operand> AddDisplacement(X86Operand &Op,
280 X86Operand &Op, unsigned AccessSize, bool IsWrite,
282 assert(Op.isMem() && "Op should be a memory operand.");
287 InstrumentMemOperandSmall(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
289 InstrumentMemOperandLarge(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
311 std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
313 InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, RegCtx, Ctx,
320 std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
323 InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, RegCtx, Ctx,
330 std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
332 InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, RegCtx, Ctx, Out);
338 std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
341 InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, RegCtx, Ctx, Out);
416 MCParsedAsmOperand &Op = *Operands[Ix];
417 if (Op.isMem()) {
418 X86Operand &MemOp = static_cast<X86Operand &>(Op);
431 void X86AddressSanitizer::ComputeMemOperandAddress(X86Operand &Op,
436 if (IsStackReg(Op.getMemBaseReg()))
438 if (IsStackReg(Op.getMemIndexReg()))
439 Displacement -= OrigSPOffset * Op.getMemScale();
443 // Emit Op as is.
445 EmitLEA(Op, Size, Reg, Out);
451 AddDisplacement(Op, Displacement, Ctx, &Residue);
466 X86AddressSanitizer::AddDisplacement(X86Operand &Op, int64_t Displacement,
471 (Op.getMemDisp() && Op.getMemDisp()->getKind() != MCExpr::Constant)) {
473 return X86Operand::CreateMem(Op.getMemModeSize(), Op.getMemSegReg(),
474 Op.getMemDisp(), Op.getMemBaseReg(),
475 Op.getMemIndexReg(), Op.getMemScale(),
480 static_cast<const MCConstantExpr *>(Op.getMemDisp())->getValue();
489 return X86Operand::CreateMem(Op.getMemModeSize(), Op.getMemSegReg(), Disp,
490 Op.getMemBaseReg(), Op.getMemIndexReg(),
491 Op.getMemScale(), SMLoc(), SMLoc());
581 void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
586 void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
617 X86Operand &Op, unsigned AccessSize, bool IsWrite,
626 ComputeMemOperandAddress(Op, 32, AddressRegI32, Ctx, Out);
640 std::unique_ptr<X86Operand> Op(
643 Op->addMemOperands(Inst, 5);
666 std::unique_ptr<X86Operand> Op(
669 EmitLEA(*Op, 32, ScratchRegI32, Out);
692 X86Operand &Op, unsigned AccessSize, bool IsWrite,
697 ComputeMemOperandAddress(Op, 32, AddressRegI32, Ctx, Out);
717 std::unique_ptr<X86Operand> Op(
720 Op->addMemOperands(Inst, 5);
841 void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
846 void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
857 std::unique_ptr<X86Operand> Op(
860 EmitLEA(*Op, 64, X86::RSP, Out);
888 X86Operand &Op, unsigned AccessSize, bool IsWrite,
899 ComputeMemOperandAddress(Op, 64, AddressRegI64, Ctx, Out);
912 std::unique_ptr<X86Operand> Op(
915 Op->addMemOperands(Inst, 5);
938 std::unique_ptr<X86Operand> Op(
941 EmitLEA(*Op, 32, ScratchRegI32, Out);
964 X86Operand &Op, unsigned AccessSize, bool IsWrite,
969 ComputeMemOperandAddress(Op, 64, AddressRegI64, Ctx, Out);
989 std::unique_ptr<X86Operand> Op(
992 Op->addMemOperands(Inst, 5);
