Lines Matching defs:X86TargetLowering
72 X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
1687 bool X86TargetLowering::useLoadStackGuardNode() const {
1692 X86TargetLowering::getPreferredVectorAction(EVT VT) const {
1701 EVT X86TargetLowering::getSetCCResultType(const DataLayout &DL,
1775 unsigned X86TargetLowering::getByValTypeAlignment(Type *Ty,
1803 X86TargetLowering::getOptimalMemOpType(uint64_t Size,
1847 bool X86TargetLowering::isSafeMemOpType(MVT VT) const {
1856 X86TargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
1882 unsigned X86TargetLowering::getJumpTableEncoding() const {
1892 bool X86TargetLowering::useSoftFloat() const {
1897 X86TargetLowering::LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI,
1908 SDValue X86TargetLowering::getPICJumpTableRelocBase(SDValue Table,
1920 const MCExpr *X86TargetLowering::
1932 X86TargetLowering::findRepresentativeClass(const TargetRegisterInfo *TRI,
1956 unsigned X86TargetLowering::getAddressSpace() const {
1962 Value *X86TargetLowering::getIRStackGuard(IRBuilder<> &IRB) const {
1977 void X86TargetLowering::insertSSPDeclarations(Module &M) const {
1999 Value *X86TargetLowering::getSDagStackGuard(const Module &M) const {
2006 Value *X86TargetLowering::getSSPStackGuardCheck(const Module &M) const {
2013 Value *X86TargetLowering::getSafeStackPointerLocation(IRBuilder<> &IRB) const {
2031 bool X86TargetLowering::isNoopAddrSpaceCast(unsigned SrcAS,
2044 bool X86TargetLowering::CanLowerReturn(
2052 const MCPhysReg *X86TargetLowering::getScratchRegisters(CallingConv::ID) const {
2058 X86TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
2222 bool X86TargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
2259 EVT X86TargetLowering::getTypeForExtReturn(LLVMContext &Context, EVT VT,
2280 SDValue X86TargetLowering::LowerCallResult(
2421 bool X86TargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const {
2436 X86TargetLowering::LowerMemArgument(SDValue Chain, CallingConv::ID CallConv,
2558 SDValue X86TargetLowering::LowerFormalArguments(
2894 SDValue X86TargetLowering::LowerMemOpCallTo(SDValue Chain, SDValue StackPtr,
2914 SDValue X86TargetLowering::EmitTailCallLoadRetAddr(
2960 X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
3473 X86TargetLowering::GetAlignedArgumentStackSize(unsigned StackSize,
3581 bool X86TargetLowering::IsEligibleForTailCallOptimization(
3773 X86TargetLowering
3869 SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const {
4070 bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
4127 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
4135 bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
4149 bool X86TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
4159 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT,
4167 bool X86TargetLowering::isCheapToSpeculateCttz() const {
4172 bool X86TargetLowering::isCheapToSpeculateCtlz() const {
4177 bool X86TargetLowering::hasAndNotCompare(SDValue Y) const {
6023 X86TargetLowering::LowerBUILD_VECTORvXi1(SDValue Op, SelectionDAG &DAG) const {
6577 X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
12276 SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
12381 X86TargetLowering::ExtractBitFromMaskVector(SDValue Op, SelectionDAG &DAG) const {
12421 X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
12527 X86TargetLowering::InsertBitToMaskVector(SDValue Op, SelectionDAG &DAG) const {
12555 SDValue X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
12778 const X86TargetLowering *TLI = Subtarget.getTargetLowering();
12809 X86TargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {
12837 SDValue X86TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
12865 X86TargetLowering::LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const {
12903 X86TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
12929 SDValue X86TargetLowering::LowerGlobalAddress(const GlobalValue *GV,
12976 X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
13131 X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
13335 SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
13388 SDValue X86TargetLowering::BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain,
13450 SDValue X86TargetLowering::LowerUINT_TO_FP_i64(SDValue Op,
13519 SDValue X86TargetLowering::LowerUINT_TO_FP_i32(SDValue Op,
13659 SDValue X86TargetLowering::lowerUINT_TO_FP_vec(SDValue Op,
13687 SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
13799 X86TargetLowering::FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
14120 SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
14244 SDValue X86TargetLowering::LowerFP_TO_SINT(SDValue Op,
14265 SDValue X86TargetLowering::LowerFP_TO_UINT(SDValue Op,
14614 SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, const SDLoc &dl,
14859 SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
14890 SDValue X86TargetLowering::ConvertCmpIfNecessary(SDValue Cmp,
14918 SDValue X86TargetLowering::getRsqrtEstimate(SDValue Op,
14951 SDValue X86TargetLowering::getRecipEstimate(SDValue Op,
14986 unsigned X86TargetLowering::combineRepeatedFPDivisors() const {
14991 SDValue X86TargetLowering::LowerToBT(SDValue And, ISD::CondCode CC,
15569 SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
15652 SDValue X86TargetLowering::LowerSETCCE(SDValue Op, SelectionDAG &DAG) const {
15720 SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
16531 SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
16807 X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
16890 SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
16947 SDValue X86TargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
18558 SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,
18586 SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
18627 unsigned X86TargetLowering::getRegisterByName(const char* RegName, EVT VT,
18660 SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
18666 unsigned X86TargetLowering::getExceptionPointerRegister(
18674 unsigned X86TargetLowering::getExceptionSelectorRegister(
18681 bool X86TargetLowering::needsFixedCatchObjects() const {
18685 SDValue X86TargetLowering
18712 SDValue X86TargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
18730 SDValue X86TargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
18737 SDValue X86TargetLowering::lowerEH_SJLJ_SETUP_DISPATCH(SDValue Op,
18748 SDValue X86TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
18900 SDValue X86TargetLowering::LowerFLT_ROUNDS_(SDValue Op,
19560 SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const {
20565 bool X86TargetLowering::needsCmpXchgNb(Type *MemType) const {
20576 bool X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
20583 X86TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
20590 X86TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
20629 X86TargetLowering::lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const {
21617 SDValue X86TargetLowering::LowerGC_TRANSITION_START(SDValue Op,
21638 SDValue X86TargetLowering::LowerGC_TRANSITION_END(SDValue Op,
21660 SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
21778 void X86TargetLowering::LowerOperationWrapper(SDNode *N,
21798 void X86TargetLowering::ReplaceNodeResults(SDNode *N,
22075 const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
22338 bool X86TargetLowering::isLegalAddressingMode(const DataLayout &DL,
22389 bool X86TargetLowering::isVectorShiftByScalarCheap(Type *Ty) const {
22407 bool X86TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
22415 bool X86TargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
22429 bool X86TargetLowering::isLegalICmpImmediate(int64_t Imm) const {
22433 bool X86TargetLowering::isLegalAddImmediate(int64_t Imm) const {
22438 bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
22446 bool X86TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
22451 bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {
22456 bool X86TargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
22480 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue) const { return true; }
22483 X86TargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const {
22503 bool X86TargetLowering::isNarrowingProfitable(EVT VT1, EVT VT2) const {
22513 X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M,
22532 X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask,
22734 X86TargetLowering::EmitVAARG64WithCustomInserter(MachineInstr &MI,
22986 MachineBasicBlock *X86TargetLowering::EmitVAStartSaveXMMRegsWithCustomInserter(
23131 X86TargetLowering::EmitLoweredSelect(MachineInstr &MI,
23408 X86TargetLowering::EmitLoweredAtomicFP(MachineInstr &MI,
23455 X86TargetLowering::EmitLoweredSegAlloca(MachineInstr &MI,
23589 X86TargetLowering::EmitLoweredCatchRet(MachineInstr &MI,
23621 X86TargetLowering::EmitLoweredCatchPad(MachineInstr &MI,
23637 X86TargetLowering::EmitLoweredTLSAddr(MachineInstr &MI,
23666 X86TargetLowering::EmitLoweredTLSCall(MachineInstr &MI,
23729 X86TargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
23877 X86TargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
23938 void X86TargetLowering::SetupEntryBlockForSjLj(MachineInstr &MI,
23991 X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI,
24177 X86TargetLowering::emitFMA3Instr(MachineInstr &MI,
24331 X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
24600 void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
24643 unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode(
24657 bool X86TargetLowering::isGAPlusOffset(SDNode *N,
30563 X86TargetLowering::DAGCombinerInfo &DCI) {
30945 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
31037 bool X86TargetLowering::isTypeDesirableForOp(unsigned Opc, EVT VT) const {
31066 bool X86TargetLowering::hasCopyImplyingStackAdjustment(
31077 bool X86TargetLowering::IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const {
31164 bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
31241 X86TargetLowering::ConstraintType
31242 X86TargetLowering::getConstraintType(StringRef Constraint) const {
31286 X86TargetLowering::getSingleConstraintMatchWeight(
31390 const char *X86TargetLowering::
31406 void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
31631 X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
31838 int X86TargetLowering::getScalingFactorCost(const DataLayout &DL,
31866 bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeSet Attr) const {
31879 void X86TargetLowering::initializeSplitCSR(MachineBasicBlock *Entry) const {
31889 void X86TargetLowering::insertCopiesSplitCSR(
