Lines Matching refs:NEXT
9 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
10 ! CHECK-NEXT: <MCOperand Reg:13>
11 ! CHECK-NEXT: <MCOperand Reg:14>
12 ! CHECK-NEXT: <MCOperand Imm:0>
13 ! CHECK-NEXT: <MCOperand Imm:0>
17 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
18 ! CHECK-NEXT: <MCOperand Reg:13>
19 ! CHECK-NEXT: <MCOperand Reg:13>
20 ! CHECK-NEXT: <MCOperand Imm:0>
21 ! CHECK-NEXT: <MCOperand Imm:0>
25 ! CHECK-NEXT: <MCInst #{{[0-9]+}} SW_RI{{$}}
26 ! CHECK-NEXT: <MCOperand Reg:13>
27 ! CHECK-NEXT: <MCOperand Reg:14>
28 ! CHECK-NEXT: <MCOperand Imm:0>
29 ! CHECK-NEXT: <MCOperand Imm:0>
33 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
34 ! CHECK-NEXT: <MCOperand Reg:13>
35 ! CHECK-NEXT: <MCOperand Reg:14>
36 ! CHECK-NEXT: <MCOperand Imm:291>
37 ! CHECK-NEXT: <MCOperand Imm:128>
41 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
42 ! CHECK-NEXT: <MCOperand Reg:13>
43 ! CHECK-NEXT: <MCOperand Reg:14>
44 ! CHECK-NEXT: <MCOperand Imm:-4>
45 ! CHECK-NEXT: <MCOperand Imm:128>
49 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
50 ! CHECK-NEXT: <MCOperand Reg:13>
51 ! CHECK-NEXT: <MCOperand Reg:14>
52 ! CHECK-NEXT: <MCOperand Imm:291>
53 ! CHECK-NEXT: <MCOperand Imm:0>
57 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
58 ! CHECK-NEXT: <MCOperand Reg:13>
59 ! CHECK-NEXT: <MCOperand Reg:14>
60 ! CHECK-NEXT: <MCOperand Imm:291>
61 ! CHECK-NEXT: <MCOperand Imm:64>
65 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
66 ! CHECK-NEXT: <MCOperand Reg:13>
67 ! CHECK-NEXT: <MCOperand Reg:14>
68 ! CHECK-NEXT: <MCOperand Imm:-4>
69 ! CHECK-NEXT: <MCOperand Imm:64>
73 ! CHECK-NEXT: <MCInst #{{[0-9]+}} SW_RI{{$}}
74 ! CHECK-NEXT: <MCOperand Reg:13>
75 ! CHECK-NEXT: <MCOperand Reg:14>
76 ! CHECK-NEXT: <MCOperand Imm:4>
77 ! CHECK-NEXT: <MCOperand Imm:128>
81 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STH_RI{{$}}
82 ! CHECK-NEXT: <MCOperand Reg:13>
83 ! CHECK-NEXT: <MCOperand Reg:14>
84 ! CHECK-NEXT: <MCOperand Imm:2>
85 ! CHECK-NEXT: <MCOperand Imm:128>>
89 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDBs_RI{{$}}
90 ! CHECK-NEXT: <MCOperand Reg:13>
91 ! CHECK-NEXT: <MCOperand Reg:14>
92 ! CHECK-NEXT: <MCOperand Imm:-1>
93 ! CHECK-NEXT: <MCOperand Imm:64>>
98 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
99 ! CHECK-NEXT: <MCOperand Reg:14>
100 ! CHECK-NEXT: <MCOperand Reg:7>
101 ! CHECK-NEXT: <MCOperand Imm:32767>
102 ! CHECK-NEXT: <MCOperand Imm:0>
106 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDADDR{{$}}
107 ! CHECK-NEXT: <MCOperand Reg:14>
108 ! CHECK-NEXT: <MCOperand Imm:32768>
113 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
114 ! CHECK-NEXT: <MCOperand Reg:2>
115 ! CHECK-NEXT: <MCOperand Reg:7>
116 ! CHECK-NEXT: <MCOperand Imm:-372>
117 ! CHECK-NEXT: <MCOperand Imm:0>
121 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
122 ! CHECK-NEXT: <MCOperand Reg:2>
123 ! CHECK-NEXT: <MCOperand Reg:7>
124 ! CHECK-NEXT: <MCOperand Imm:-372>
125 ! CHECK-NEXT: <MCOperand Imm:0>
130 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
131 ! CHECK-NEXT: <MCOperand Reg:27>
132 ! CHECK-NEXT: <MCOperand Reg:19>
133 ! CHECK-NEXT: <MCOperand Reg:16>
134 ! CHECK-NEXT: <MCOperand Imm:128>
138 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
139 ! CHECK-NEXT: <MCOperand Reg:27>
140 ! CHECK-NEXT: <MCOperand Reg:19>
141 ! CHECK-NEXT: <MCOperand Reg:16>
142 ! CHECK-NEXT: <MCOperand Imm:0>
146 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
147 ! CHECK-NEXT: <MCOperand Reg:27>
148 ! CHECK-NEXT: <MCOperand Reg:19>
149 ! CHECK-NEXT: <MCOperand Reg:16>
150 ! CHECK-NEXT: <MCOperand Imm:2>
154 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
155 ! CHECK-NEXT: <MCOperand Reg:27>
156 ! CHECK-NEXT: <MCOperand Reg:19>
157 ! CHECK-NEXT: <MCOperand Reg:16>
158 ! CHECK-NEXT: <MCOperand Imm:64>
162 ! CHECK-NEXT: <MCInst #{{[0-9]+}} SW_RR{{$}}
163 ! CHECK-NEXT: <MCOperand Reg:27>
164 ! CHECK-NEXT: <MCOperand Reg:19>
165 ! CHECK-NEXT: <MCOperand Reg:16>
166 ! CHECK-NEXT: <MCOperand Imm:64>
170 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDBs_RR{{$}}
171 ! CHECK-NEXT: <MCOperand Reg:27>
172 ! CHECK-NEXT: <MCOperand Reg:19>
173 ! CHECK-NEXT: <MCOperand Reg:16>
174 ! CHECK-NEXT: <MCOperand Imm:2>
178 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDHz_RR{{$}}
179 ! CHECK-NEXT: <MCOperand Reg:27>
180 ! CHECK-NEXT: <MCOperand Reg:19>
181 ! CHECK-NEXT: <MCOperand Reg:16>
182 ! CHECK-NEXT: <MCOperand Imm:2>
188 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
189 ! CHECK-NEXT: <MCOperand Reg:10>
190 ! CHECK-NEXT: <MCOperand Reg:13>
191 ! CHECK-NEXT: <MCOperand Imm:0>
192 ! CHECK-NEXT: <MCOperand Imm:0>
196 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
197 ! CHECK-NEXT: <MCOperand Reg:10>
198 ! CHECK-NEXT: <MCOperand Reg:13>
199 ! CHECK-NEXT: <MCOperand Imm:1>
200 ! CHECK-NEXT: <MCOperand Imm:128>
204 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
205 ! CHECK-NEXT: <MCOperand Reg:10>
206 ! CHECK-NEXT: <MCOperand Reg:13>
207 ! CHECK-NEXT: <MCOperand Imm:1>
208 ! CHECK-NEXT: <MCOperand Imm:0>
212 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
213 ! CHECK-NEXT: <MCOperand Reg:10>
214 ! CHECK-NEXT: <MCOperand Reg:13>
215 ! CHECK-NEXT: <MCOperand Imm:1>
216 ! CHECK-NEXT: <MCOperand Imm:64>
221 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STADDR{{$}}
222 ! CHECK-NEXT: <MCOperand Reg:37>
223 ! CHECK-NEXT: <MCOperand Imm:4660>
227 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDADDR{{$}}
228 ! CHECK-NEXT: <MCOperand Reg:2>
229 ! CHECK-NEXT: <MCOperand Imm:65164>
234 ! CHECK-NEXT: fixup A - offset: 0, value: hi(x), kind: FIXUP_LANAI_HI16{{$}}
235 ! CHECK-NEXT: <MCInst #{{[0-9]+}} ADD_I_HI
236 ! CHECK-NEXT: <MCOperand Reg:11>
237 ! CHECK-NEXT: <MCOperand Reg:7>
238 ! CHECK-NEXT: <MCOperand Expr:(hi(x))>
242 ! CHECK-NEXT: fixup A - offset: 0, value: (hi(l))+4, kind: FIXUP_LANAI_HI16{{$}}
243 ! CHECK-NEXT: <MCInst #{{[0-9]+}} ADD_I_HI
244 ! CHECK-NEXT: <MCOperand Reg:14>
245 ! CHECK-NEXT: <MCOperand Reg:7>
246 ! CHECK-NEXT: <MCOperand Expr:((hi(l))+4)>
