Lines Matching full:ashr
27 %B = ashr i32 %A, 0 ; <i32> [#uses=1]
36 %B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1]
103 %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef
111 %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef
140 %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
223 %B = ashr i32 %A, 8 ; <i32> [#uses=1]
239 %B = ashr i8 %a, 3 ; <i8> [#uses=1]
250 %B = ashr exact i8 %a, 3
307 %tmp.3 = ashr i32 %X, 4
340 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
352 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
362 %B = ashr i8 %A, 7 ; <i8> [#uses=1]
397 %C = ashr i32 %B, 24 ; <i32> [#uses=1]
409 %Q = ashr i8 %Z, 5 ; <i8> [#uses=1]
555 ; CHECK-NEXT: [[Z:%.*]] = ashr i32 [[X1]], %C
558 %X = ashr i32 %A, %C
559 %Y = ashr i32 %B, %C
589 %tmp1 = ashr i32 %X, 7
747 ; CHECK-NEXT: [[Z:%.*]] = ashr exact i32 %a, 2
750 %y = ashr exact i32 %a, 3
780 %A = ashr exact i32 %x, 1
787 ; CHECK-NEXT: [[B:%.*]] = ashr i32 %x, 2
791 %B = ashr i32 %A, 3
811 %B = ashr i32 %A, 1
871 %shr = ashr i32 %x, 1
880 ; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 %x, 3
884 %shr = ashr i32 %x, 4
893 ; CHECK-NEXT: [[SHR:%.*]] = ashr i32 %x, 4
898 %shr = ashr i32 %x, 4
907 ; CHECK-NEXT: [[SHL:%.*]] = ashr exact i32 %x, 3
911 %shr = ashr exact i32 %x, 4
972 %b = ashr i32 %a, 32 ; shift all bits out
980 %b = ashr <4 x i32> %a, <i32 32, i32 32, i32 32, i32 32> ; shift all bits out
986 ; CHECK-NEXT: [[B:%.*]] = ashr <4 x i32> %a, <i32 32, i32 0, i32 1, i32 2>
989 %b = ashr <4 x i32> %a, <i32 32, i32 0, i32 1, i32 2> ; shift all bits out
997 ; CHECK-NEXT: [[B:%.*]] = ashr <2 x i65> [[SEXT]], <i65 33, i65 33>
1002 %b = ashr <2 x i65> %sext, <i65 33, i65 33>
