Lines Matching refs:RegUnit
225 << "getRegUnitWeight(unsigned RegUnit) const {\n"
226 << " assert(RegUnit < " << RegBank.getNumNativeRegUnits()
232 const RegUnit &RU = RegBank.getRegUnit(UnitIdx);
233 assert(RU.Weight < 256 && "RegUnit too heavy");
237 << " return RUWeightTable[RegUnit];\n";
322 << "getRegUnitPressureSets(unsigned RegUnit) const {\n"
323 << " assert(RegUnit < " << RegBank.getNumNativeRegUnits()
333 << " return &RCSetsTable[RUSetStartTable[RegUnit]];\n"
577 // Differentially encoded register and regunit lists allow for better
925 // Emit the shared table of regunit lane mask sequences.
967 // Emit the table of register unit roots. Each regunit has one or two root
1122 << " unsigned getRegUnitWeight(unsigned RegUnit) const override;\n"
1130 << "unsigned RegUnit) const override;\n"
