Lines Matching full:"$ target"
1707 $(TARGET:%=$(ObjDir)/%GenRegisterInfo.inc.tmp): \
1710 $(Verb) $(LLVMTableGen) -gen-register-info -o $(call SYSPATH, $@) $<
1711
1712 $(TARGET:%=$(ObjDir)/%GenInstrInfo.inc.tmp): \
1715 $(Verb) $(LLVMTableGen) -gen-instr-info -o $(call SYSPATH, $@) $<
1716
1717 $(TARGET:%=$(ObjDir)/%GenAsmWriter.inc.tmp): \
1720 $(Verb) $(LLVMTableGen) -gen-asm-writer -o $(call SYSPATH, $@) $<
1721
1722 $(TARGET:%=$(ObjDir)/%GenAsmWriter1.inc.tmp): \
1725 $(Verb) $(LLVMTableGen) -gen-asm-writer -asmwriternum=1 -o $(call SYSPATH, $@) $<
1726
1727 $(TARGET:%=$(ObjDir)/%GenAsmMatcher.inc.tmp): \
1730 $(Verb) $(LLVMTableGen) -gen-asm-matcher -o $(call SYSPATH, $@) $<
1731
1732 $(TARGET:%=$(ObjDir)/%GenMCCodeEmitter.inc.tmp): \
1735 $(Verb) $(LLVMTableGen) -gen-emitter -mc-emitter -o $(call SYSPATH, $@) $<
1736
1737 $(TARGET:%=$(ObjDir)/%GenMCPseudoLowering.inc.tmp): \
1740 $(Verb) $(LLVMTableGen) -gen-pseudo-lowering -o $(call SYSPATH, $@) $<
1741
1742 $(TARGET:%=$(ObjDir)/%GenCodeEmitter.inc.tmp): \
1745 $(Verb) $(LLVMTableGen) -gen-emitter -o $(call SYSPATH, $@) $<
1746
1747 $(TARGET:%=$(ObjDir)/%GenDAGISel.inc.tmp): \
1750 $(Verb) $(LLVMTableGen) -gen-dag-isel -o $(call SYSPATH, $@) $<
1751
1752 $(TARGET:%=$(ObjDir)/%GenDisassemblerTables.inc.tmp): \
1755 $(Verb) $(LLVMTableGen) -gen-disassembler -o $(call SYSPATH, $@) $<
1756
1757 $(TARGET:%=$(ObjDir)/%GenEDInfo.inc.tmp): \
1760 $(Verb) $(LLVMTableGen) -gen-enhanced-disassembly-info -o $(call SYSPATH, $@) $<
1761
1762 $(TARGET:%=$(ObjDir)/%GenFastISel.inc.tmp): \
1765 $(Verb) $(LLVMTableGen) -gen-fast-isel -o $(call SYSPATH, $@) $<
1766
1767 $(TARGET:%=$(ObjDir)/%GenSubtargetInfo.inc.tmp): \
1770 $(Verb) $(LLVMTableGen) -gen-subtarget -o $(call SYSPATH, $@) $<
1771
1772 $(TARGET:%=$(ObjDir)/%GenCallingConv.inc.tmp): \
1775 $(Verb) $(LLVMTableGen) -gen-callingconv -o $(call SYSPATH, $@) $<
1776
1777 $(TARGET:%=$(ObjDir)/%GenIntrinsics.inc.tmp): \
