Lines Matching refs:adapter
51 * @v adapter e1000 private structure
60 e1000_get_hw_control ( struct e1000_adapter *adapter )
68 switch (adapter->hw.mac_type) {
70 swsm = E1000_READ_REG(&adapter->hw, SWSM);
71 E1000_WRITE_REG(&adapter->hw, SWSM,
79 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
80 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
91 * @v adapter e1000 private structure
94 e1000_irq_enable ( struct e1000_adapter *adapter )
96 E1000_WRITE_REG ( &adapter->hw, IMS, IMS_ENABLE_MASK );
97 E1000_WRITE_FLUSH ( &adapter->hw );
103 * @v adapter e1000 private structure
106 e1000_irq_disable ( struct e1000_adapter *adapter )
108 E1000_WRITE_REG ( &adapter->hw, IMC, ~0 );
109 E1000_WRITE_FLUSH ( &adapter->hw );
115 * @v adapter e1000 private structure
117 * e1000_sw_init initializes the Adapter private data structure.
122 e1000_sw_init ( struct e1000_adapter *adapter )
124 struct e1000_hw *hw = &adapter->hw;
125 struct pci_device *pdev = adapter->pdev;
137 adapter->eeprom_wol = 0;
138 adapter->wol = adapter->eeprom_wol;
139 adapter->en_mng_pt = 0;
140 adapter->rx_int_delay = 0;
141 adapter->rx_abs_int_delay = 0;
143 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
144 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
184 e1000_irq_disable ( adapter );
192 * @v adapter e1000 private structure
197 e1000_setup_tx_resources ( struct e1000_adapter *adapter )
211 adapter->tx_base =
212 malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
214 if ( ! adapter->tx_base ) {
218 memset ( adapter->tx_base, 0, adapter->tx_ring_size );
220 DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
226 e1000_free_tx_resources ( struct e1000_adapter *adapter )
230 free_dma ( adapter->tx_base, adapter->tx_ring_size );
235 * @adapter: board private structure
240 e1000_configure_tx ( struct e1000_adapter *adapter )
242 struct e1000_hw *hw = &adapter->hw;
249 E1000_WRITE_REG ( hw, TDBAL, virt_to_bus ( adapter->tx_base ) );
250 E1000_WRITE_REG ( hw, TDLEN, adapter->tx_ring_size );
259 adapter->tx_head = 0;
260 adapter->tx_tail = 0;
261 adapter->tx_fill_ctr = 0;
281 e1000_free_rx_resources ( struct e1000_adapter *adapter )
287 free_dma ( adapter->rx_base, adapter->rx_ring_size );
290 free_iob ( adapter->rx_iobuf[i] );
297 * @v adapter e1000 private structure
301 int e1000_refill_rx_ring ( struct e1000_adapter *adapter )
306 struct e1000_hw *hw = &adapter->hw;
312 rx_curr = ( ( adapter->rx_curr + i ) % NUM_RX_DESC );
313 rx_curr_desc = adapter->rx_base + rx_curr;
318 if ( adapter->rx_iobuf[rx_curr] != NULL )
324 adapter->rx_iobuf[rx_curr] = iob;
342 * @v adapter e1000 private structure
347 e1000_setup_rx_resources ( struct e1000_adapter *adapter )
357 adapter->rx_base =
358 malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
360 if ( ! adapter->rx_base ) {
363 memset ( adapter->rx_base, 0, adapter->rx_ring_size );
367 adapter->rx_iobuf[i] = NULL;
371 rc = e1000_refill_rx_ring ( adapter );
373 e1000_free_rx_resources ( adapter );
380 * @adapter: board private structure
385 e1000_configure_rx ( struct e1000_adapter *adapter )
387 struct e1000_hw *hw = &adapter->hw;
398 adapter->rx_curr = 0;
403 E1000_WRITE_REG ( hw, RDBAL, virt_to_bus ( adapter->rx_base ) );
405 E1000_WRITE_REG ( hw, RDLEN, adapter->rx_ring_size );
467 * @v adapter e1000 private structure
470 e1000_reset ( struct e1000_adapter *adapter )
477 switch (adapter->hw.mac_type) {
515 E1000_WRITE_REG ( &adapter->hw, PBA, pba );
531 if (adapter->hw.mac_type < e1000_82576) {
533 adapter->hw.fc_high_water = fc_high_water_mark & 0xFFF8;
534 adapter->hw.fc_low_water = adapter->hw.fc_high_water - 8;
537 adapter->hw.fc_high_water = fc_high_water_mark & 0xFFF0;
538 adapter->hw.fc_low_water = adapter->hw.fc_high_water - 16;
541 if (adapter->hw.mac_type == e1000_80003es2lan ||
542 adapter->hw.mac_type == e1000_82576)
543 adapter->hw.fc_pause_time = 0xFFFF;
545 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
546 adapter->hw.fc_send_xon = 1;
547 adapter->hw.fc = adapter->hw.original_fc;
550 e1000_reset_hw ( &adapter->hw );
552 if ( adapter->hw.mac_type >= e1000_82544 )
553 E1000_WRITE_REG ( &adapter->hw, WUC, 0 );
555 if ( e1000_init_hw ( &adapter->hw ) )
558 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
559 if (adapter->hw.mac_type >= e1000_82544 &&
560 adapter->hw.mac_type <= e1000_82547_rev_2 &&
561 adapter->hw.autoneg == 1 &&
562 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
563 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
568 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
571 e1000_phy_get_info ( &adapter->hw, &adapter->phy_info );
573 if (!adapter->smart_power_down &&
574 (adapter->hw.mac_type == e1000_82571 ||
575 adapter->hw.mac_type == e1000_82572)) {
580 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
583 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
599 adapter = netdev_priv ( netdev );
600 struct e1000_hw *hw = &adapter->hw;
609 e1000_irq_disable ( adapter );
618 e1000_free_tx_resources ( adapter );
619 e1000_free_rx_resources ( adapter );
633 struct e1000_adapter *adapter = netdev_priv( netdev );
634 struct e1000_hw *hw = &adapter->hw;
635 uint32_t tx_curr = adapter->tx_tail;
640 if ( adapter->tx_fill_ctr == NUM_TX_DESC ) {
648 adapter->tx_iobuf[tx_curr] = iobuf;
650 tx_curr_desc = ( void * ) ( adapter->tx_base ) +
651 ( tx_curr * sizeof ( *adapter->tx_base ) );
666 DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
670 adapter->tx_tail = ( adapter->tx_tail + 1 ) % NUM_TX_DESC;
671 adapter->tx_fill_ctr++;
676 E1000_WRITE_REG ( hw, TDT, adapter->tx_tail );
689 struct e1000_adapter *adapter = netdev_priv( netdev );
690 struct e1000_hw *hw = &adapter->hw;
712 while ( ( i = adapter->tx_head ) != adapter->tx_tail ) {
714 tx_curr_desc = ( void * ) ( adapter->tx_base ) +
715 ( i * sizeof ( *adapter->tx_base ) );
724 adapter->tx_head, adapter->tx_tail, tx_status );
728 netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
732 netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
739 adapter->tx_fill_ctr--;
742 adapter->tx_head = ( adapter->tx_head + 1 ) % NUM_TX_DESC;
749 i = adapter->rx_curr;
751 rx_curr_desc = ( void * ) ( adapter->rx_base ) +
752 ( i * sizeof ( *adapter->rx_base ) );
760 if ( adapter->rx_iobuf[i] == NULL )
763 DBG ( "RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, RCTL ) );
772 iob_put ( adapter->rx_iobuf[i], rx_len );
776 netdev_rx_err ( netdev, adapter->rx_iobuf[i], -EINVAL );
781 netdev_rx ( netdev, adapter->rx_iobuf[i] );
783 adapter->rx_iobuf[i] = NULL;
787 adapter->rx_curr = ( adapter->rx_curr + 1 ) % NUM_RX_DESC;
789 e1000_refill_rx_ring(adapter);
795 * @v adapter e1000 adapter
801 struct e1000_adapter *adapter = netdev_priv(netdev);
806 e1000_irq_enable ( adapter );
808 e1000_irq_disable ( adapter );
827 struct e1000_adapter *adapter;
850 adapter = netdev_priv ( netdev );
851 memset ( adapter, 0, ( sizeof ( *adapter ) ) );
853 adapter->hw.io_base = pdev->ioaddr;
854 adapter->ioaddr = pdev->ioaddr;
855 adapter->irqno = pdev->irq;
856 adapter->netdev = netdev;
857 adapter->pdev = pdev;
858 adapter->hw.back = adapter;
860 adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
861 adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
874 adapter->hw.hw_addr = ioremap ( mmio_start, mmio_len );
875 DBG ( "adapter->hw.hw_addr: %p\n", adapter->hw.hw_addr );
877 if ( ! adapter->hw.hw_addr )
881 if ( ( err = e1000_sw_init ( adapter ) ) )
884 DBG ( "adapter->hw.mac_type: %#08x\n", adapter->hw.mac_type );
889 if ( ( adapter->hw.mac_type == e1000_ich8lan ) && ( pdev->ioaddr ) ) {
892 adapter->hw.flash_address = ioremap ( flash_start, flash_len );
893 if ( ! adapter->hw.flash_address )
898 if ( e1000_init_eeprom_params ( &adapter->hw ) ) {
906 err = e1000_reset_hw ( &adapter->hw );
913 if ( e1000_validate_eeprom_checksum( &adapter->hw ) < 0 ) {
919 if ( e1000_read_mac_addr ( &adapter->hw ) )
922 memcpy ( netdev->hw_addr, adapter->hw.mac_addr, ETH_ALEN );
926 struct e1000_hw *hw = &adapter->hw;
944 e1000_reset ( adapter );
946 e1000_get_hw_control ( adapter );
963 if ( ! e1000_check_phy_reset_block ( &adapter->hw ) )
964 e1000_phy_hw_reset ( &adapter->hw );
965 if ( adapter->hw.flash_address )
966 iounmap ( adapter->hw.flash_address );
969 iounmap ( adapter->hw.hw_addr );
986 struct e1000_adapter *adapter = netdev_priv ( netdev );
990 if ( adapter->hw.flash_address )
991 iounmap ( adapter->hw.flash_address );
992 if ( adapter->hw.hw_addr )
993 iounmap ( adapter->hw.hw_addr );
996 e1000_reset_hw ( &adapter->hw );
1011 struct e1000_adapter *adapter = netdev_priv(netdev);
1017 err = e1000_setup_tx_resources ( adapter );
1024 err = e1000_setup_rx_resources ( adapter );
1030 e1000_configure_tx ( adapter );
1032 e1000_configure_rx ( adapter );
1034 DBG ( "RXDCTL: %#08x\n", E1000_READ_REG ( &adapter->hw, RXDCTL ) );
1039 e1000_free_tx_resources ( adapter );
1041 e1000_reset ( adapter );
1058 struct e1000_adapter *adapter = hw->back;
1062 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
1066 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
1074 struct e1000_adapter *adapter = hw->back;
1076 pci_write_config_word ( adapter->pdev, PCI_COMMAND,
1083 struct e1000_adapter *adapter = hw->back;
1085 pci_write_config_word ( adapter->pdev, PCI_COMMAND, hw->pci_cmd_word );
1091 struct e1000_adapter *adapter = hw->back;
1093 pci_read_config_word ( adapter->pdev, reg, value );
1099 struct e1000_adapter *adapter = hw->back;
1101 pci_write_config_word ( adapter->pdev, reg, *value );
