Lines Matching refs:BREAK
591 break;
620 break;
650 break;
664 break;
679 break;
694 break;
709 break;
724 break;
739 break;
754 break;
772 break;
979 break;
982 break;
985 break;
988 break;
991 break;
994 break;
997 break;
1186 break;
1200 break;
1234 break;
1241 break;
1261 break;
1266 break;
1271 break;
1276 break;
1298 break;
1305 break;
1335 break;
1338 break;
1341 break;
1353 break;
1381 case RET: set_pc(target); break;
1392 case TBZ: break;
1393 case TBNZ: take_branch = !take_branch; break;
1406 case CBZ_w: take_branch = (wreg(rt) == 0); break;
1407 case CBZ_x: take_branch = (xreg(rt) == 0); break;
1408 case CBNZ_w: take_branch = (wreg(rt) != 0); break;
1409 case CBNZ_x: take_branch = (xreg(rt) != 0); break;
1433 break;
1441 break;
1531 case AND: result = op1 & op2; break;
1532 case ORR: result = op1 | op2; break;
1533 case EOR: result = op1 ^ op2; break;
1650 case LDRB_w: set_wreg_no_log(srcdst, MemoryRead<uint8_t>(address)); break;
1651 case LDRH_w: set_wreg_no_log(srcdst, MemoryRead<uint16_t>(address)); break;
1652 case LDR_w: set_wreg_no_log(srcdst, MemoryRead<uint32_t>(address)); break;
1653 case LDR_x: set_xreg_no_log(srcdst, MemoryRead<uint64_t>(address)); break;
1654 case LDRSB_w: set_wreg_no_log(srcdst, MemoryRead<int8_t>(address)); break;
1655 case LDRSH_w: set_wreg_no_log(srcdst, MemoryRead<int16_t>(address)); break;
1656 case LDRSB_x: set_xreg_no_log(srcdst, MemoryRead<int8_t>(address)); break;
1657 case LDRSH_x: set_xreg_no_log(srcdst, MemoryRead<int16_t>(address)); break;
1658 case LDRSW_x: set_xreg_no_log(srcdst, MemoryRead<int32_t>(address)); break;
1659 case LDR_s: set_sreg_no_log(srcdst, MemoryRead<float>(address)); break;
1660 case LDR_d: set_dreg_no_log(srcdst, MemoryRead<double>(address)); break;
1662 case STRB_w: MemoryWrite<uint8_t>(address, wreg(srcdst)); break;
1663 case STRH_w: MemoryWrite<uint16_t>(address, wreg(srcdst)); break;
1664 case STR_w: MemoryWrite<uint32_t>(address, wreg(srcdst)); break;
1665 case STR_x: MemoryWrite<uint64_t>(address, xreg(srcdst)); break;
1666 case STR_s: MemoryWrite<float>(address, sreg(srcdst)); break;
1667 case STR_d: MemoryWrite<double>(address, dreg(srcdst)); break;
1691 // is only updated after the load so pop(fp) will never break the invariant
1761 break;
1767 break;
1773 break;
1779 break;
1785 break;
1791 break;
1797 break;
1803 break;
1809 break;
1836 // is only updated after the load so pop(fp) will never break the invariant
1862 break;
1866 break;
1870 break;
1874 break;
1947 break;
1955 break;
1960 break;
1978 break;
1982 break;
1986 break;
1990 break;
2009 break;
2012 break;
2015 break;
2018 break;
2021 break;
2024 break;
2027 break;
2029 break;
2031 break;
2034 break;
2038 break;
2062 break;
2075 break;
2078 case LSLV_x: shift_op = LSL; break;
2080 case LSRV_x: shift_op = LSR; break;
2082 case ASRV_x: shift_op = ASR; break;
2084 case RORV_x: shift_op = ROR; break;
2145 break;
2149 break;
2150 case SMADDL_x: result = xreg(instr->Ra()) + (rn_s32 * rm_s32); break;
2151 case SMSUBL_x: result = xreg(instr->Ra()) - (rn_s32 * rm_s32); break;
2152 case UMADDL_x: result = xreg(instr->Ra()) + (rn_u32 * rm_u32); break;
2153 case UMSUBL_x: result = xreg(instr->Ra()) - (rn_u32 * rm_u32); break;
2157 break;
2195 break;
2200 break;
2204 break;
2248 case FMOV_s_imm: set_sreg(dest, instr->ImmFP32()); break;
2249 case FMOV_d_imm: set_dreg(dest, instr->ImmFP64()); break;
2264 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break;
2265 case FCVTAS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieAway)); break;
2266 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break;
2267 case FCVTAS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieAway)); break;
2268 case FCVTAU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPTieAway)); break;
2269 case FCVTAU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPTieAway)); break;
2270 case FCVTAU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPTieAway)); break;
2271 case FCVTAU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPTieAway)); break;
2274 break;
2277 break;
2280 break;
2283 break;
2286 break;
2289 break;
2292 break;
2295 break;
2296 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break;
2297 case FCVTNS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieEven)); break;
2298 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break;
2299 case FCVTNS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieEven)); break;
2300 case FCVTNU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPTieEven)); break;
2301 case FCVTNU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPTieEven)); break;
2302 case FCVTNU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPTieEven)); break;
2303 case FCVTNU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPTieEven)); break;
2304 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break;
2305 case FCVTZS_xs: set_xreg(dst, FPToInt64(sreg(src), FPZero)); break;
2306 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break;
2307 case FCVTZS_xd: set_xreg(dst, FPToInt64(dreg(src), FPZero)); break;
2308 case FCVTZU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPZero)); break;
2309 case FCVTZU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPZero)); break;
2310 case FCVTZU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPZero)); break;
2311 case FCVTZU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPZero)); break;
2312 case FMOV_ws: set_wreg(dst, sreg_bits(src)); break;
2313 case FMOV_xd: set_xreg(dst, dreg_bits(src)); break;
2314 case FMOV_sw: set_sreg_bits(dst, wreg(src)); break;
2315 case FMOV_dx: set_dreg_bits(dst, xreg(src)); break;
2319 case SCVTF_dx: set_dreg(dst, FixedToDouble(xreg(src), 0, round)); break;
2320 case SCVTF_dw: set_dreg(dst, FixedToDouble(wreg(src), 0, round)); break;
2321 case UCVTF_dx: set_dreg(dst, UFixedToDouble(xreg(src), 0, round)); break;
2324 break;
2326 case SCVTF_sx: set_sreg(dst, FixedToFloat(xreg(src), 0, round)); break;
2327 case SCVTF_sw: set_sreg(dst, FixedToFloat(wreg(src), 0, round)); break;
2328 case UCVTF_sx: set_sreg(dst, UFixedToFloat(xreg(src), 0, round)); break;
2331 break;
2353 break;
2356 break;
2359 break;
2363 break;
2367 break;
2370 break;
2373 break;
2377 break;
2437 case FCMP_d: FPCompare(fn_val, fpreg(reg_size, instr->Rm())); break;
2439 case FCMP_d_zero: FPCompare(fn_val, 0.0); break;
2462 break;
2480 case FCSEL_s: set_sreg(instr->Rd(), sreg(selected)); break;
2481 case FCSEL_d: set_dreg(instr->Rd(), dreg(selected)); break;
2494 case FMOV_s: set_sreg(fd, sreg(fn)); break;
2495 case FMOV_d: set_dreg(fd, dreg(fn)); break;
2496 case FABS_s: set_sreg(fd, std::fabs(sreg(fn))); break;
2497 case FABS_d: set_dreg(fd, std::fabs(dreg(fn))); break;
2498 case FNEG_s: set_sreg(fd, -sreg(fn)); break;
2499 case FNEG_d: set_dreg(fd, -dreg(fn)); break;
2500 case FSQRT_s: set_sreg(fd, FPSqrt(sreg(fn))); break;
2501 case FSQRT_d: set_dreg(fd, FPSqrt(dreg(fn))); break;
2502 case FRINTA_s: set_sreg(fd, FPRoundInt(sreg(fn), FPTieAway)); break;
2503 case FRINTA_d: set_dreg(fd, FPRoundInt(dreg(fn), FPTieAway)); break;
2505 set_sreg(fd, FPRoundInt(sreg(fn), FPNegativeInfinity)); break;
2507 set_dreg(fd, FPRoundInt(dreg(fn), FPNegativeInfinity)); break;
2510 break;
2513 break;
2514 case FRINTN_s: set_sreg(fd, FPRoundInt(sreg(fn), FPTieEven)); break;
2515 case FRINTN_d: set_dreg(fd, FPRoundInt(dreg(fn), FPTieEven)); break;
2516 case FRINTZ_s: set_sreg(fd, FPRoundInt(sreg(fn), FPZero)); break;
2517 case FRINTZ_d: set_dreg(fd, FPRoundInt(dreg(fn), FPZero)); break;
2518 case FCVT_ds: set_dreg(fd, FPToDouble(sreg(fn))); break;
2519 case FCVT_sd: set_sreg(fd, FPToFloat(dreg(fn), FPTieEven)); break;
2790 break;
2804 break;
2812 break;
2816 break;
2820 break;
2934 break; // Fall through.
2940 case FADD_s: set_sreg(fd, FPAdd(sreg(fn), sreg(fm))); break;
2941 case FADD_d: set_dreg(fd, FPAdd(dreg(fn), dreg(fm))); break;
2942 case FSUB_s: set_sreg(fd, FPSub(sreg(fn), sreg(fm))); break;
2943 case FSUB_d: set_dreg(fd, FPSub(dreg(fn), dreg(fm))); break;
2944 case FMUL_s: set_sreg(fd, FPMul(sreg(fn), sreg(fm))); break;
2945 case FMUL_d: set_dreg(fd, FPMul(dreg(fn), dreg(fm))); break;
2946 case FDIV_s: set_sreg(fd, FPDiv(sreg(fn), sreg(fm))); break;
2947 case FDIV_d: set_dreg(fd, FPDiv(dreg(fn), dreg(fm))); break;
2948 case FMAX_s: set_sreg(fd, FPMax(sreg(fn), sreg(fm))); break;
2949 case FMAX_d: set_dreg(fd, FPMax(dreg(fn), dreg(fm))); break;
2950 case FMIN_s: set_sreg(fd, FPMin(sreg(fn), sreg(fm))); break;
2951 break;
2973 case FMADD_s: set_sreg(fd, FPMulAdd(sreg(fa), sreg(fn), sreg(fm))); break;
2974 case FMSUB_s: set_sreg(fd, FPMulAdd(sreg(fa), -sreg(fn), sreg(fm))); break;
2975 case FMADD_d: set_dreg(fd, FPMulAdd(dreg(fa), dreg(fn), dreg(fm))); break;
2976 case FMSUB_d: set_dreg(fd, FPMulAdd(dreg(fa), -dreg(fn), dreg(fm))); break;
2980 break;
2983 break;
2986 break;
2989 break;
3248 case NZCV: set_xreg(instr->Rt(), nzcv().RawValue()); break;
3249 case FPCR: set_xreg(instr->Rt(), fpcr().RawValue()); break;
3252 break;
3259 break;
3263 break;
3266 break;
3272 case NOP: break;
3391 break;
3440 // Tell the simulator to break after the next executed BL.
3579 // break / b -------------------------------------------------------------
3580 } else if (strcmp(cmd, "break") == 0 || strcmp(cmd, "b") == 0) {
3590 PrintF("Use `break <address>` to set or disable a breakpoint\n");
3637 "break / b\n"
3638 " break : list all breakpoints\n"
3639 " break <address> : set / enable / disable a breakpoint.\n"
3675 // We are going to break, so printing something is not an issue in
3677 if (FLAG_trace_sim_messages || FLAG_trace_sim || (parameters & BREAK)) {
3702 break;
3705 break;
3708 break;
3730 // Check if the debugger should break.
3731 if (parameters & BREAK) Debug();
3746 break;
3842 break;
3845 break;
3848 break;
3855 break;
