Lines Matching refs:DefineAsRegister
83 selector->Emit(opcode, g.DefineAsRegister(node),
90 selector->Emit(opcode, g.DefineAsRegister(node),
255 outputs[output_count++] = g.DefineAsRegister(node);
257 outputs[output_count++] = g.DefineAsRegister(cont->result());
308 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
318 InstructionOperand result_operand = g.DefineAsRegister(node);
411 InstructionOperand output = g.DefineAsRegister(node);
519 Emit(kArmVmovF32U32, g.DefineAsRegister(node), temp);
553 Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), fp_lo, fp_hi);
658 g.DefineAsRegister(node), offset_operand, length_operand,
716 selector->Emit(opcode, g.DefineAsRegister(node), g.UseRegister(left),
721 g.DefineAsRegister(node), g.UseRegister(left),
731 selector->Emit(kArmUbfx, g.DefineAsRegister(node), g.UseRegister(left),
771 g.DefineAsRegister(m.node()), g.UseRegister(mshr.left().node()),
792 Emit(kArmUxth, g.DefineAsRegister(m.node()),
799 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
843 Emit(opcode, g.DefineAsRegister(node), value_operand, shift_operand);
847 g.DefineAsRegister(node), g.UseRegister(m.left().node()));
873 outputs[output_count++] = g.DefineAsRegister(node);
875 outputs[output_count++] = g.DefineAsRegister(cont->result());
939 Emit(kArmSxth, g.DefineAsRegister(node),
943 Emit(kArmSxtb, g.DefineAsRegister(node),
947 Emit(kArmSbfx, g.DefineAsRegister(node),
969 g.DefineAsRegister(node),
970 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
994 g.DefineAsRegister(node),
995 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
1017 g.DefineAsRegister(node),
1018 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
1056 outputs[output_count++] = g.DefineAsRegister(node);
1058 outputs[output_count++] = g.DefineAsRegister(projection1);
1110 Emit(kArmMla, g.DefineAsRegister(node),
1118 Emit(kArmSmmla, g.DefineAsRegister(node),
1127 Emit(kArmUxtab, g.DefineAsRegister(node),
1132 Emit(kArmUxtah, g.DefineAsRegister(node),
1144 Emit(kArmSxtab, g.DefineAsRegister(node),
1149 Emit(kArmSxtah, g.DefineAsRegister(node),
1164 Emit(kArmMla, g.DefineAsRegister(node),
1172 Emit(kArmSmmla, g.DefineAsRegister(node),
1181 Emit(kArmUxtab, g.DefineAsRegister(node),
1186 Emit(kArmUxtah, g.DefineAsRegister(node),
1198 Emit(kArmSxtab, g.DefineAsRegister(node),
1203 Emit(kArmSxtah, g.DefineAsRegister(node),
1224 Emit(kArmMls, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),
1237 InstructionOperand result_operand = g.DefineAsRegister(node);
1257 selector->Emit(opcode, g.DefineAsRegister(cont->result()), temp_operand,
1271 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1278 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1295 InstructionOperand outputs[] = {g.TempRegister(), g.DefineAsRegister(node)};
1648 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
1820 outputs[output_count++] = g.DefineAsRegister(node);
1828 outputs[output_count++] = g.DefineAsRegister(cont->result());
1997 selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
2172 Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(right),
2188 Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(left),
2217 g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
