Lines Matching refs:DefineAsRegister
143 selector->Emit(opcode, g.DefineAsRegister(node),
150 selector->Emit(opcode, g.DefineAsRegister(node),
159 selector->Emit(opcode, g.DefineAsRegister(node),
228 InstructionOperand outputs[] = {g.DefineAsRegister(node)};
458 outputs[output_count++] = g.DefineAsRegister(node);
462 outputs[output_count++] = g.DefineAsRegister(cont->result());
496 selector->Emit(negate_opcode, g.DefineAsRegister(node),
534 outputs[0] = g.DefineAsRegister(output == nullptr ? node : output);
758 Emit(opcode, g.DefineAsRegister(node), g.UseRegister(buffer),
763 Emit(opcode, g.DefineAsRegister(node), g.UseRegister(buffer),
857 selector->Emit(inv_opcode, g.DefineAsRegister(node),
870 selector->Emit(inv_opcode, g.DefineAsRegister(node),
878 selector->Emit(kArm64Not32, g.DefineAsRegister(node),
881 selector->Emit(kArm64Not, g.DefineAsRegister(node),
914 Emit(kArm64Ubfx32, g.DefineAsRegister(node),
954 Emit(kArm64Ubfx, g.DefineAsRegister(node),
1019 Emit(kArm64Lsl32, g.DefineAsRegister(node),
1026 Emit(kArm64Ubfiz32, g.DefineAsRegister(node),
1045 Emit(kArm64Lsl, g.DefineAsRegister(node),
1071 selector->Emit(opcode, g.DefineAsRegister(node),
1097 Emit(kArm64Ubfx32, g.DefineAsRegister(node),
1118 Emit(kArm64Lsr, g.DefineAsRegister(node), smull_operand,
1141 Emit(kArm64Ubfx, g.DefineAsRegister(node),
1169 Emit(kArm64Asr, g.DefineAsRegister(node), smull_operand,
1196 Emit(kArm64Asr32, g.DefineAsRegister(node), add_operand,
1224 Emit(kArm64Clz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
1230 Emit(kArm64Clz32, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
1267 Emit(kArm64Madd32, g.DefineAsRegister(node),
1279 Emit(kArm64Madd32, g.DefineAsRegister(node),
1298 Emit(kArm64Madd, g.DefineAsRegister(node),
1310 Emit(kArm64Madd, g.DefineAsRegister(node),
1330 Emit(kArm64Msub32, g.DefineAsRegister(node),
1351 Emit(kArm64Msub, g.DefineAsRegister(node),
1368 InstructionOperand result = g.DefineAsRegister
1384 selector->Emit(opcode, g.DefineAsRegister(cont->result()), result, result);
1399 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1409 Emit(kArm64Mneg32, g.DefineAsRegister(node),
1421 Emit(kArm64Mneg32, g.DefineAsRegister(node),
1441 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1451 Emit(kArm64Mneg, g.DefineAsRegister(node),
1463 Emit(kArm64Mneg, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1477 Emit(kArm64Asr, g.DefineAsRegister(node), smull_operand, g.TempImmediate(32));
1486 Emit(kArm64Lsr, g.DefineAsRegister(node), smull_operand, g.TempImmediate(32));
1584 outputs[output_count++] = g.DefineAsRegister(node);
1588 outputs[output_count++] = g.DefineAsRegister(success_output);
1601 outputs[output_count++] = g.DefineAsRegister(node);
1605 outputs[output_count++] = g.DefineAsRegister(success_output);
1618 outputs[output_count++] = g.DefineAsRegister(node);
1622 outputs[output_count++] = g.DefineAsRegister(success_output);
1635 outputs[output_count++] = g.DefineAsRegister(node);
1639 outputs[output_count++] = g.DefineAsRegister(success_output);
1729 Emit(kArm64Mov32, g.DefineAsRegister(node), g.UseRegister(value));
2000 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
2780 Emit(kArm64Float64ExtractLowWord32, g.DefineAsRegister(node),
2787 Emit(kArm64Float64ExtractHighWord32, g.DefineAsRegister(node),
2802 Emit(kArm64Float64MoveU64, g.DefineAsRegister(node), g.UseRegister(right));
2805 Emit(kArm64Float64InsertLowWord32, g.DefineAsRegister(node),
2819 Emit(kArm64Float64MoveU64, g.DefineAsRegister(node), g.UseRegister(left));
2822 Emit(kArm64Float64InsertHighWord32, g.DefineAsRegister(node),
2851 g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
