Lines Matching refs:OutputRegister
390 auto result = i.OutputRegister(); \
502 __ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
739 __ mov(i.OutputRegister(), sp);
742 __ mov(i.OutputRegister(), fp);
746 __ ld(i.OutputRegister(), MemOperand(fp, 0));
748 __ mov(i.OutputRegister(), fp);
752 __ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0));
775 __ Daddu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp,
845 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
848 __ Daddu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
854 __ Subu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
857 __ Dsubu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
863 __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
869 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
872 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
875 __ Dmulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
878 __ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
880 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
882 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
886 __ Divu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
888 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
890 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
894 __ Mod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
897 __ Modu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
900 __ Dmul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
903 __ Ddiv(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
905 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
907 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
911 __ Ddivu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
913 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
915 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
919 __ Dmod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
922 __ Dmodu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
926 __ Dlsa(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
931 __ Lsa(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
935 __ And(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
941 __ And(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
944 __ And(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
948 __ Or(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
954 __ Or(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
957 __ Or(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
962 __ Nor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
965 __ Nor(i.OutputRegister(), i.InputRegister(0), zero_reg);
972 __ Nor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
976 __ Nor(i.OutputRegister(), i.InputRegister(0), zero_reg);
980 __ Xor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
986 __ Xor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
989 __ Xor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
993 __ Clz(i.OutputRegister(), i.InputRegister(0));
996 __ dclz(i.OutputRegister(), i.InputRegister(0));
1011 __ Subu(i.OutputRegister(), reg1, reg2);
1015 __ li(i.OutputRegister(), 0x20);
1031 __ Subu(i.OutputRegister(), reg1, reg2);
1035 __ li(i.OutputRegister(), 0x40);
1080 __ Daddu(i.OutputRegister(), reg1, reg2);
1132 __ Daddu(i.OutputRegister(), reg1, reg2);
1136 __ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1139 __ sll(i.OutputRegister(), i.InputRegister(0),
1146 __ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1150 __ srl(i.OutputRegister(), i.InputRegister(0),
1157 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1161 __ sra(i.OutputRegister(), i.InputRegister(0),
1166 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1171 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2));
1173 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1181 __ Dext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1184 __ Dextm(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1188 __ Dextu(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1195 __ Dins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2));
1197 __ Dins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1203 __ dsllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1207 __ dsll(i.OutputRegister(), i.InputRegister(0),
1210 __ dsll32(i.OutputRegister(), i.InputRegister(0),
1217 __ dsrlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1221 __ dsrl(i.OutputRegister(), i.InputRegister(0),
1224 __ dsrl32(i.OutputRegister(), i.InputRegister(0),
1231 __ dsrav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1235 __ dsra(i.OutputRegister(), i.InputRegister(0), imm);
1237 __ dsra32(i.OutputRegister(), i.InputRegister(0), imm - 32);
1242 __ Ror(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
1245 __ Dror(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
1257 __ mov(i.OutputRegister(), i.InputRegister(0));
1259 __ li(i.OutputRegister(), i.InputOperand(0));
1528 __ mfc1(i.OutputRegister(), scratch);
1534 __ mfc1(i.OutputRegister(), scratch);
1540 __ mfc1(i.OutputRegister(), scratch);
1547 __ mfc1(i.OutputRegister(), scratch);
1553 __ mfc1(i.OutputRegister(), scratch);
1559 __ mfc1(i.OutputRegister(), scratch);
1565 __ mfc1(i.OutputRegister(), scratch);
1571 __ mfc1(i.OutputRegister(), scratch);
1574 __ addiu(kScratchReg, i.OutputRegister(), 1);
1575 __ slt(kScratchReg2, kScratchReg, i.OutputRegister());
1576 __ Movn(i.OutputRegister(), kScratchReg, kScratchReg2);
1593 __ dmfc1(i.OutputRegister(), scratch);
1601 __ mov(i.OutputRegister(1), result);
1621 __ dmfc1(i.OutputRegister(0), scratch);
1629 __ mov(i.OutputRegister(1), result);
1638 __ Trunc_uw_d(i.InputDoubleRegister(0), i.OutputRegister(), scratch);
1644 __ Trunc_uw_s(i.InputDoubleRegister(0), i.OutputRegister(), scratch);
1647 __ addiu(kScratchReg, i.OutputRegister(), 1);
1648 __ Movz(i.OutputRegister(), zero_reg, kScratchReg);
1653 Register result = instr->OutputCount() > 1 ? i.OutputRegister(1) : no_reg;
1655 __ Trunc_ul_s(i.InputDoubleRegister(0), i.OutputRegister(), scratch,
1661 Register result = instr->OutputCount() > 1 ? i.OutputRegister(1) : no_reg;
1663 __ Trunc_ul_d(i.InputDoubleRegister(0), i.OutputRegister(0), scratch,
1668 __ dmfc1(i.OutputRegister(), i.InputDoubleRegister(0));
1674 __ FmoveLow(i.OutputRegister(), i.InputDoubleRegister(0));
1677 __ FmoveHigh(i.OutputRegister(), i.InputDoubleRegister(0));
1688 __ seb(i.OutputRegister(), i.InputRegister(0));
1691 __ seh(i.OutputRegister(), i.InputRegister(0));
1694 __ lbu(i.OutputRegister(), i.MemoryOperand());
1697 __ lb(i.OutputRegister(), i.MemoryOperand());
1703 __ lhu(i.OutputRegister(), i.MemoryOperand());
1706 __ Ulhu(i.OutputRegister(), i.MemoryOperand());
1709 __ lh(i.OutputRegister(), i.MemoryOperand());
1712 __ Ulh(i.OutputRegister(), i.MemoryOperand());
1721 __ lw(i.OutputRegister(), i.MemoryOperand());
1724 __ Ulw(i.OutputRegister(), i.MemoryOperand());
1727 __ lwu(i.OutputRegister(), i.MemoryOperand());
1730 __ Ulwu(i.OutputRegister(), i.MemoryOperand());
1733 __ ld(i.OutputRegister(), i.MemoryOperand());
1736 __ Uld(i.OutputRegister(), i.MemoryOperand());
1824 __ ByteSwapSigned(i.OutputRegister(0), i.InputRegister(0), 8);
1828 __ ByteSwapUnsigned(i.OutputRegister(0), i.InputRegister(0), 4);
1829 __ dsrl32(i.OutputRegister(0), i.OutputRegister(0), 0);
1959 __ dsra32(kScratchReg, i.OutputRegister(), 0);
1960 __ sra(at, i.OutputRegister(), 31);
1965 __ DaddBranchOvf(i.OutputRegister(), i.InputRegister(0),
1969 __ DaddBranchOvf(i.OutputRegister(), i.InputRegister(0),
1979 __ DsubBranchOvf(i.OutputRegister(), i.InputRegister(0),
1983 __ DsubBranchOvf(i.OutputRegister(), i.InputRegister(0),
1993 __ MulBranchOvf(i.OutputRegister(), i.InputRegister(0),
1997 __ MulBranchOvf(i.OutputRegister(), i.InputRegister(0),
2053 Register result = i.OutputRegister(instr->OutputCount() - 1);
2079 __ dsrl32(kScratchReg, i.OutputRegister(), 31);
2080 __ srl(at, i.OutputRegister(), 31);
2091 __ DaddBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
2096 __ DsubBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
2100 __ MulBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
