Lines Matching refs:Instruction
128 inline Instruction* instr() const { return instr_; }
133 explicit SimInstructionBase(Instruction* instr) {}
136 Instruction* instr_;
147 explicit SimInstruction(Instruction* instr) { *this = instr; }
149 SimInstruction& operator=(Instruction* instr) {
205 // instruction.
304 void Format(Instruction* instr, const char* format);
312 inline uint16_t ReadHU(int64_t addr, Instruction* instr);
313 inline int16_t ReadH(int64_t addr, Instruction* instr);
315 inline void WriteH(int64_t addr, uint16_t value, Instruction* instr);
316 inline void WriteH(int64_t addr, int16_t value, Instruction* instr);
318 inline uint32_t ReadWU(int64_t addr, Instruction* instr);
319 inline int32_t ReadW(int64_t addr, Instruction* instr);
320 inline void WriteW(int64_t addr, int32_t value, Instruction* instr);
321 inline int64_t Read2W(int64_t addr, Instruction* instr);
322 inline void Write2W(int64_t addr, int64_t value, Instruction* instr);
324 inline double ReadD(int64_t addr, Instruction* instr);
325 inline void WriteD(int64_t addr, double value, Instruction* instr);
373 // Executing is handled based on the instruction type.
407 Instruction* instr_after_compact_branch =
408 reinterpret_cast<Instruction*>(current_pc + Instruction::kInstrSize);
411 "Error: Unexpected instruction 0x%08x immediately after a "
412 "compact branch instruction.",
420 void HandleStop(uint64_t code, Instruction* instr);
421 bool IsStopInstruction(Instruction* instr);
429 // Executes one instruction.
430 void InstructionDecode(Instruction* instr);
431 // Execute one instruction placed in a branch delay slot.
432 void BranchDelayInstructionDecode(Instruction* instr) {
450 Instruction* instr);
504 Instruction* break_pc_;
511 // instruction, if bit 31 of watched_stops_[code].count is unset.
