Lines Matching full:bits4
198 #define BITS4(_b3,_b2,_b1,_b0) \
202 ((BITS4((_b7),(_b6),(_b5),(_b4)) << 4) \
203 | BITS4((_b3),(_b2),(_b1),(_b0)))
3386 && INSN(15,12) == BITS4(0,0,1,0)) {
4520 case BITS4(1,1,1,0): goto fail; //ATC
4521 case BITS4(0,1,1,0):
4526 case BITS4(1,1,1,1): goto fail; //ATC
4527 case BITS4(0,1,1,1):
4532 case BITS4(0,1,0,0):
4537 case BITS4(0,1,0,1):
4543 case BITS4(1,1,0,0):
4548 case BITS4(1,1,0,1):
5676 case BITS4(0,0,0,0): nRegs = 4; break;
5677 case BITS4(0,1,0,0): nRegs = 3; break;
5678 case BITS4(1,0,0,0): nRegs = 2; break;
5679 case BITS4(0,1,1,1): nRegs = 1; break;
5889 case BITS4(0,0,1,0): nRegs = 4; break;
5890 case BITS4(0,1,1,0): nRegs = 3; break;
5891 case BITS4(1,0,1,0): nRegs = 2; break;
8592 if (bitOP == 0 && imm4 == BITS4(0,0,0,0)) {
8620 if (bitOP == 0 && imm4 == BITS4(0,0,0,1)) {
8669 if (bitQ == 1 && bitOP == 0 && imm4 == BITS4(0,0,1,1)) {
8732 if (bitOP == 0 && (imm4 == BITS4(0,1,0,1) || imm4 == BITS4(0,1,1,1))) {
9026 if (bitOP == 0 && imm4 == BITS4(0,0,0,0)) {
9385 if (immh >= BITS4(0,1,0,0) && opcode == BITS5(1,1,1,0,0)) {
9423 if (immh >= BITS4(0,1,0,0) && opcode == BITS5(1,1,1,1,1)) {
9491 && (opcode == BITS4(1,1,0,1)
9492 || opcode == BITS4(1,0,0,1) || opcode == BITS4(1,0,1,1))) {
9499 case BITS4(1,1,0,1): ks = 0; break;
9500 case BITS4(1,0,0,1): ks = 1; break;
9501 case BITS4(1,0,1,1): ks = 2; break;
10186 && (opcode == BITS4(0,0,0,1) || opcode == BITS4(0,1,0,1))) {
10190 Bool isSUB = opcode == BITS4(0,1,0,1);
10220 if (size >= X10 && opcode == BITS4(1,0,0,1)) {
10250 && (opcode == BITS4(1,0,1,1)
10251 || opcode == BITS4(0,0,1,1) || opcode == BITS4(0,1,1,1))) {
10258 case BITS4(1,0,1,1): ks = 0; break;
10259 case BITS4(0,0,1,1): ks = 1; break;
10260 case BITS4(0,1,1,1): ks = 2; break;
10304 if (opcode == BITS4(1,1,0,0) || opcode == BITS4(1,1,0,1)) {
10322 BITS4(1,1,0,1);
10742 if (immh < BITS4(0,1,0,0)) return False;
10788 if (immh < BITS4(0,1,0,0)) return False;
10861 if (opcode == BITS4(0,0,0,0) || opcode == BITS4(0,0,1,0)) {
10870 Bool isADD = opcode == BITS4(0,0,0,0);
10887 if (opcode == BITS4(0,0,0,1) || opcode == BITS4(0,0,1,1)) {
10896 Bool isADD = opcode == BITS4(0,0,0,1);
10912 if (opcode == BITS4(0,1,0,0) || opcode == BITS4(0,1,1,0)) {
10921 Bool isADD = opcode == BITS4(0,1,0,0);
10951 if (opcode == BITS4(0,1,0,1) || opcode == BITS4(0,1,1,1)) {
10960 Bool isACC = opcode == BITS4(0,1,0,1);
10978 if (opcode == BITS4(1,1,0,0)
10979 || opcode == BITS4(1,0,0,0) || opcode == BITS4(1,0,1,0)) {
10989 case BITS4(1,1,0,0): ks = 0; break;
10990 case BITS4(1,0,0,0): ks = 1; break;
10991 case BITS4(1,0,1,0): ks = 2; break;
11018 && (opcode == BITS4(1,1,0,1)
11019 || opcode == BITS4(1,0,0,1) || opcode == BITS4(1,0,1,1))) {
11026 case BITS4(1,1,0,1): ks = 0; break;
11027 case BITS4(1,0,0,1): ks = 1; break;
11028 case BITS4(1,0,1,1): ks = 2; break;
11059 if (bitU == 0 && opcode == BITS4(1,1,1,0)) {
12517 && (opcode == BITS4(0,0,0,1) || opcode == BITS4(0,1,0,1))) {
12522 Bool isSUB = opcode == BITS4(0,1,0,1);
12551 if (size >= X10 && opcode == BITS4(1,0,0,1)) {
12580 if ((bitU == 1 && (opcode == BITS4(0,0,0,0) || opcode == BITS4(0,1,0,0)))
12581 || (bitU == 0 && opcode == BITS4(1,0,0,0))) {
12585 Bool isMLA = opcode == BITS4(0,0,0,0);
12586 Bool isMLS = opcode == BITS4(0,1,0,0);
12627 if (opcode == BITS4(1,0,1,0)
12628 || opcode == BITS4(0,0,1,0) || opcode == BITS4(0,1,1,0)) {
12638 case BITS4(1,0,1,0): ks = 0; break;
12639 case BITS4(0,0,1,0): ks = 1; break;
12640 case BITS4(0,1,1,0): ks = 2; break;
12682 && (opcode == BITS4(1,0,1,1)
12683 || opcode == BITS4(0,0,1,1) || opcode == BITS4(0,1,1,1))) {
12690 case BITS4(1,0,1,1): ks = 0; break;
12691 case BITS4(0,0,1,1): ks = 1; break;
12692 case BITS4(0,1,1,1): ks = 2; break;
12739 if (opcode == BITS4(1,1,0,0) || opcode == BITS4(1,1,0,1)) {
12757 Bool isR = opcode == BITS4(1,1,0,1);
12817 || INSN(21,21) != 1 || INSN(13,10) != BITS4(1,0,0,0)) {
13062 case BITS4(0,0,0,1): // S -> D
13063 case BITS4(1,1,0,1): { // H -> D
13075 case BITS4(0,1,0,0): // D -> S
13076 case BITS4(0,1,1,1): { // D -> H
13089 case BITS4(0,0,1,1): // S -> H
13090 case BITS4(1,1,0,0): { // H -> S
13202 if (ty <= X01 && opcode <= BITS4(0,1,1,1)) {
13215 case BITS4(0,0,0,0): nm = "fmul"; iop = mkMULF(ity); break;
13216 case BITS4(0,0,0,1): nm = "fdiv"; iop = mkDIVF(ity); break;
13217 case BITS4(0,0,1,0): nm = "fadd"; iop = mkADDF(ity); break;
13218 case BITS4(0,0,1,1): nm = "fsub"; iop = mkSUBF(ity); break;
13219 case BITS4(0,1,0,0): nm = "fmax"; iop = mkVecMAXF(ty+2); break;
13220 case BITS4(0,1,0,1): nm = "fmin"; iop = mkVecMINF(ty+2); break;
13221 case BITS4(0,1,1,0): nm = "fmaxnm"; iop = mkVecMAXF(ty+2); break; //!!
13222 case BITS4(0,1,1,1): nm = "fminnm"; iop = mkVecMINF(ty+2); break; //!!
13225 if (opcode <= BITS4(0,0,1,1)) {
13241 if (ty <= X01 && opcode == BITS4(1,0,0,0)) {
13955 case BITS4(1,0,0,0): case BITS4(1,0,0,1):
13959 case BITS4(1,0,1,0): case BITS4(1,0,1,1):
13963 case BITS4(0,1,0,0): case BITS4(0,1,1,0):
13964 case BITS4(1,1,0,0): case BITS4(1,1,1,0):
13968 case BITS4(0,1,0,1): case BITS4(1,1,0,1):
13972 case BITS4(0,1,1,1): case BITS4(1,1,1,1):
13976 case BITS4(0,0,0,0): case BITS4(0,0,0,1):
13977 case BITS4(0,0,1,0): case BITS4(0,0,1,1):
