Lines Matching full:bits4
245 #define BITS4(_b3,_b2,_b1,_b0) \
249 ((BITS4((_b7),(_b6),(_b5),(_b4)) << 4) \
250 | BITS4((_b3),(_b2),(_b1),(_b0)))
5259 if ((INSN(11,8) & BITS4(1,0,1,0)) == BITS4(0,0,0,0)) {
5365 if ((INSN(11,8) & BITS4(1,0,1,1)) == BITS4(0,0,1,0)) {
5422 if ((INSN(11,8) & BITS4(1,0,1,1)) == BITS4(0,0,1,1) && !U) {
5496 if ((INSN(11,8) & BITS4(1,1,1,0)) == BITS4(1,0,0,0)) {
5593 if (INSN(11,8) == BITS4(1,0,1,0)) {
5637 if (INSN(11,8) == BITS4(1,0,1,1) && !U) {
5700 if (INSN(11,8) == BITS4(1,1,0,0)) {
5798 if (INSN(11,8) == BITS4(1,1,0,1)) {
7487 if (((B >> 1) & BITS4(1,1,0,1)) == BITS4(1,0,0,0)) {
7503 } else if (((B >> 1) & BITS4(1,1,0,1)) == BITS4(1,0,0,1)) {
8526 if (fB == BITS4(0,0,1,0) // Dd, Dd+1, Dd+2, Dd+3 inc = 1 regs = 4
8527 || fB == BITS4(0,1,1,0) // Dd, Dd+1, Dd+2 inc = 1 regs = 3
8528 || fB == BITS4(0,1,1,1) // Dd inc = 2 regs = 1
8529 || fB == BITS4(1,0,1,0)) { // Dd, Dd+1 inc = 1 regs = 2
8536 if (fB == BITS4(0,0,1,1) // Dd, Dd+1, Dd+2, Dd+3 inc=2 regs = 2
8537 || fB == BITS4(1,0,0,0) // Dd, Dd+1 inc=1 regs = 1
8538 || fB == BITS4(1,0,0,1)) { // Dd, Dd+2 inc=2 regs = 1
8543 } else if (fB == BITS4(0,1,0,0) || fB == BITS4(0,1,0,1)) {
8547 } else if (fB == BITS4(0,0,0,0) || fB == BITS4(0,0,0,1)) {
8555 if (N == 1 && fB == BITS4(0,0,1,1)) {
8558 if (fB == BITS4(1,0,1,0)) {
8560 } else if (fB == BITS4(0,1,1,0)) {
8562 } else if (fB == BITS4(0,0,1,0)) {
8865 && INSN(27,24) == BITS4(1,1,1,1)) {
8941 vassert(INSNA(31,28) == BITS4(0,0,0,0)); // caller's obligation
8951 if (INSNT0(15,4) == 0xFB1 && INSNT1(15,12) == BITS4(1,1,1,1)
8963 BITS4(0,0,0,0) == INSNA(15,12) &&
8964 BITS4(1,0,0,0) == (INSNA(7,4) & BITS4(1,0,0,1)) ) {
9009 if (INSNT0(15,4) == 0xFB3 && INSNT1(15,12) == BITS4(1,1,1,1)
9020 INSNA(15,12) == BITS4(0,0,0,0) &&
9021 (INSNA(7,4) & BITS4(1,0,1,1)) == BITS4(1,0,1,0)) {
9248 && INSNT1(15,12) == BITS4(0,0,0,0)
9249 && INSNT1(7,4) == BITS4(0,0,0,0)) {
9319 INSNA(11,8) == BITS4(1,1,1,1) &&
9320 INSNA(7,4) == BITS4(0,0,1,1)) {
9380 INSNA(11,8) == BITS4(1,1,1,1) &&
9381 INSNA(7,4) == BITS4(0,0,0,1)) {
9429 INSNA(11,8) == BITS4(1,1,1,1) &&
9430 INSNA(7,4) == BITS4(0,0,0,1)) {
9479 INSNA(11,8) == BITS4(1,1,1,1) &&
9480 INSNA(7,4) == BITS4(0,1,1,1)) {
9529 INSNA(11,8) == BITS4(1,1,1,1) &&
9530 INSNA(7,4) == BITS4(0,1,1,1)) {
9579 INSNA(11,8) == BITS4(1,1,1,1) &&
9580 (INSNA(7,4) == BITS4(1,0,0,1))) {
9628 INSNA(11,8) == BITS4(1,1,1,1) &&
9629 (INSNA(7,4) == BITS4(1,0,0,1))) {
9678 INSNA(11,8) == BITS4(1,1,1,1) &&
9679 (INSNA(7,4) == BITS4(1,1,1,1))) {
9728 INSNA(11,8) == BITS4(1,1,1,1) &&
9729 INSNA(7,4) == BITS4(1,1,1,1)) {
9778 INSNA(11,8) == BITS4(1,1,1,1) &&
9779 INSNA(7,4) == BITS4(1,0,0,1)) {
9823 INSNA(11,8) == BITS4(1,1,1,1) &&
9824 INSNA(7,4) == BITS4(1,1,1,1)) {
9868 INSNA(11,8) == BITS4(1,1,1,1) &&
9869 (INSNA(7,4) == BITS4(1,0,0,1))) {
9913 INSNA(11,8) == BITS4(1,1,1,1) &&
9914 (INSNA(7,4) == BITS4(1,1,1,1))) {
9958 INSNA(11,8) == BITS4(1,1,1,1) &&
9959 INSNA(7,4) == BITS4(1,0,0,1)) {
10003 INSNA(11,8) == BITS4(1,1,1,1) &&
10004 INSNA(7,4) == BITS4(0,0,0,1)) {
10048 INSNA(11,8) == BITS4(1,1,1,1) &&
10049 INSNA(7,4) == BITS4(1,0,0,1)) {
10093 INSNA(11,8) == BITS4(1,1,1,1) &&
10094 INSNA(7,4) == BITS4(0,0,0,1)) {
10138 INSNA(11,8) == BITS4(1,1,1,1) &&
10139 INSNA(7,4) == BITS4(0,1,1,1)) {
10185 INSNA(11,8) == BITS4(1,1,1,1) &&
10186 INSNA(7,4) == BITS4(0,1,0,1)) {
10254 INSNA(11,8) == BITS4(1,1,1,1) &&
10255 INSNA(7,4) == BITS4(0,0,1,1)) {
10322 INSNA(11,8) == BITS4(1,1,1,1) &&
10323 INSNA(7,4) == BITS4(0,0,1,1)) {
10400 INSNA(15,12) == BITS4(1,1,1,1) &&
10401 (INSNA(7,4) & BITS4(1,0,0,1)) == BITS4(0,0,0,1) ) {
10481 (INSNA(7,4) & BITS4(1,0,0,1)) == BITS4(0,0,0,1)) {
10570 (INSNA(7,4) & BITS4(1,0,0,1)) == BITS4(1,0,0,0)) {
10640 (INSNA(7,4) & BITS4(1,0,0,1)) == BITS4(1,0,0,0)) {
10714 (INSNA(7,4) & BITS4(1,0,1,1)) == BITS4(1,0,0,0)) {
10784 INSNA(11,8) == BITS4(1,1,1,1) &&
10785 INSNA(7,4) == BITS4(1,0,1,1)) {
10925 if (INSNT0(15,4) == 0xFB7 && INSNT1(7,4) == BITS4(0,0,0,0)) {
10935 INSNA(7,4) == BITS4(0,0,0,1) ) {
10986 INSNA(11,8) == BITS4(0,0,0,0) &&
10987 INSNA(7,4) == BITS4(0,1,0,1)) {
11037 INSNA(11,8) == BITS4(0,0,0,0) &&
11038 INSNA(7,4) == BITS4(0,1,0,1)) {
11096 INSNA(11,8) == BITS4(0,0,0,0) &&
11097 INSNA(7,4) == BITS4(0,1,0,1)) {
11147 INSNA(11,8) == BITS4(0,0,0,0) &&
11148 INSNA(7,4) == BITS4(0,1,0,1)) {
11206 INSNA(11,8) == BITS4(1,1,1,1) &&
11207 INSNA(7,4) == BITS4(0,1,1,1)) {
11251 INSNA(11,8) == BITS4(1,1,1,1) &&
11252 INSNA(7,4) == BITS4(0,0,0,1)) {
11296 INSNA(11,8) == BITS4(1,1,1,1) &&
11297 INSNA(7,4) == BITS4(1,1,1,1)) {
11341 INSNA(11,8) == BITS4(1,1,1,1) &&
11342 INSNA(7,4) == BITS4(0,1,1,1)) {
11386 INSNA(11,8) == BITS4(1,1,1,1) &&
11387 INSNA(7,4) == BITS4(0,0,0,1)) {
11431 INSNA(11,8) == BITS4(1,1,1,1) &&
11432 INSNA(7,4) == BITS4(0,1,0,1)) {
11500 INSNA(11,8) == BITS4(1,1,1,1) &&
11501 INSNA(7,4) == BITS4(0,0,1,1)) {
11568 INSNA(11,8) == BITS4(1,1,1,1) &&
11569 INSNA(7,4) == BITS4(0,1,0,1)) {
11646 INSNA(11,8) == BITS4(1,1,1,1) &&
11647 INSNA(7,4) == BITS4(0,0,1,1)) {
11722 INSNA(11,8) == BITS4(1,1,1,1) &&
11723 INSNA(7,4) == BITS4(0,1,0,1)) {
11796 INSNA(11,8) == BITS4(1,1,1,1) &&
11797 INSNA(7,4) == BITS4(1,1,1,1)) {
11916 INSNA(11,8) == BITS4(1,1,1,1) &&
11917 INSNA(7,4) == BITS4(0,0,1,1)) {
12013 INSNA(11,8) == BITS4(1,1,1,1) &&
12014 INSNA(7,4) == BITS4(0,0,1,1)) {
12110 INSNA(11,8) == BITS4(1,1,1,1) &&
12111 INSNA(7,4) == BITS4(0,1,0,1)) {
12207 INSNA(11,8) == BITS4(1,1,1,1) &&
12208 INSNA(7,4) == BITS4(0,1,0,1)) {
12304 INSNA(11,8) == BITS4(1,1,1,1) &&
12305 INSNA(7,4) == BITS4(0,1,1,1)) {
12355 && INSNA(15,12) != BITS4(1,1,1,1)
12356 && (INSNA(7,4) & BITS4(1,1,0,1)) == BITS4(1,1,0,1)) {
12399 (INSNT1(7,4) & BITS4(1,1,1,0)) == BITS4(1,1,0,0)) {
12411 && (INSNA(7,4) & BITS4(1,1,0,1)) == BITS4(0,0,0,1)) {
12488 (INSNT1(7,4) & BITS4(1,1,1,0)) == BITS4(1,1,0,0))) {
12500 (INSNA(7,4) & BITS4(1,1,0,1)) == BITS4(0,1,0,1)) {
12816 vassert(INSN(31,28) == BITS4(0,0,0,0)); // caller's obligation
12850 && INSN(11,8) == BITS4(1,0,1,1)) {
12987 && INSN(11,8) == BITS4(1,0,1,1)) {
13104 && BITS4(1,0,1,0) == INSN(11,8)
13108 if (reg == BITS4(0,0,0,1)) {
13134 && BITS4(1,0,1,0) == INSN(11,8)
13138 if (reg == BITS4(0,0,0,1)) {
13248 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) {
13259 else if ((opc & BITS4(1,0,0,1)) == BITS4(0,0,0,1)) {
13270 else if ((opc & BITS4(1,0,1,1)) == BITS4(0,0,0,0)) {
13296 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) {
13310 else if ((opc & BITS4(1,0,0,1)) == BITS4(0,0,0,1)) {
13324 else if ((opc & BITS4(1,0,1,1)) == BITS4(0,0,0,0) && U == 0) {
13342 && BITS4(0,0,0,0) == INSN(7,4) && INSN(11,8) == BITS4(1,0,1,0)) {
13358 && BITS4(0,0,0,0) == INSN(7,4) && INSN(11,8) == BITS4(1,0,1,1)) {
13375 && BITS4(1,0,1,1) == INSN(11,8) && INSN(6,6) == 0 && INSN(4,4) == 1) {
13427 && BITS4(1,0,1,1) == INSN(11,8)) {
13459 && BITS4(1,0,1,1) == INSN(11,8)
13460 && BITS4(0,0,0,0) == (INSN(7,4) & BITS4(0,0,0,1))) {
13471 case BITS4(0,0,0,0): /* MAC: d + n * m */
13479 case BITS4(0,0,0,1): /* NMAC: d + -(n * m) */
13488 case BITS4(0,0,1,0): /* MSC: - d + n * m */
13496 case BITS4(0,0,1,1): /* NMSC: - d + -(n * m) */
13505 case BITS4(0,1,0,0): /* MUL: n * m */
13510 case BITS4(0,1,0,1): /* NMUL: - n * m */
13517 case BITS4(0,1,1,0): /* ADD: n + m */
13522 case BITS4(0,1,1,1): /* SUB: n - m */
13527 case BITS4(1,0,0,0): /* DIV: n / m */
13532 case BITS4(1,0,1,0): /* VNFMS: -(d - n * m) (fused) */
13543 case BITS4(1,0,1,1): /* VNFMA: -(d + n * m) (fused) */
13554 case BITS4(1,1,0,0): /* VFMA: d + n * m (fused) */
13564 case BITS4(1,1,0,1): /* VFMS: d + (-n * m) (fused) */
13597 && BITS4(0,1,0,0) == (INSN(19,16) & BITS4(1,1,1,0))
13598 && BITS4(1,0,1,1) == INSN(11,8)
13599 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
13654 && BITS4(0,0,0,0) == (INSN(19,16) & BITS4(1,1,1,0))
13655 && BITS4(1,0,1,1) == INSN(11,8)
13656 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
13696 && BITS4(1,0,0,0) == (INSN(19,16) & BITS4(1,1,1,1))
13697 && BITS4(1,0,1,1) == INSN(11,8)
13698 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
13721 && BITS4(1,1,0,0) == (INSN(19,16) & BITS4(1,1,1,0))
13722 && BITS4(1,0,1,1) == INSN(11,8)
13723 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
13778 && INSN(11,8) == BITS4(1,0,1,0)) {
13896 && BITS4(1,0,1,0) == INSN(11,8)
13897 && BITS4(0,0,0,0) == INSN(3,0)
13898 && BITS4(0,0,0,1) == (INSN(7,4) & BITS4(0,1,1,1))) {
13931 && BITS4(1,0,1,0) == INSN(11,8)) {
13964 && BITS4(1,0,1,0) == (INSN(11,8) & BITS4(1,1,1,0))
13965 && BITS4(0,0,0,0) == (INSN(7,4) & BITS4(0,0,0,1))) {
13979 case BITS4(0,0,0,0): /* MAC: d + n * m */
13986 case BITS4(0,0,0,1): /* NMAC: d + -(n * m) */
13995 case BITS4(0,0,1,0): /* MSC: - d + n * m */
14002 case BITS4(0,0,1,1): /* NMSC: - d + -(n * m) */
14012 case BITS4(0,1,0,0): /* MUL: n * m */
14017 case BITS4(0,1,0,1): /* NMUL: - n * m */
14024 case BITS4(0,1,1,0): /* ADD: n + m */
14029 case BITS4(0,1,1,1): /* SUB: n - m */
14034 case BITS4(1,0,0,0): /* DIV: n / m */
14039 case BITS4(1,0,1,0): /* VNFMS: -(d - n * m) (fused) */
14050 case BITS4(1,0,1,1): /* VNFMA: -(d + n * m) (fused) */
14061 case BITS4(1,1,0,0): /* VFMA: d + n * m (fused) */
14071 case BITS4(1,1,0,1): /* VFMS: d + (-n * m) (fused) */
14104 && BITS4(0,1,0,0) == (INSN(19,16) & BITS4(1,1,1,0))
14105 && BITS4(1,0,1,0) == INSN(11,8)
14106 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
14166 && BITS4(0,0,0,0) == (INSN(19,16) & BITS4(1,1,1,0))
14167 && BITS4(1,0,1,0) == INSN(11,8)
14168 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
14215 && BITS4(1,0,0,0) == INSN(19,16)
14216 && BITS4(1,0,1,0) == (INSN(11,8) & BITS4(1,1,1,0))
14217 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
14247 && BITS4(1,1,0,0) == (INSN(19,16) & BITS4(1,1,1,0))
14248 && BITS4(1,0,1,0) == INSN(11,8)
14249 && BITS4(0,1,0,0) == (INSN(7,4) & BITS4(0,1,0,1))) {
14284 && BITS4(0,1,1,1) == INSN(19,16)
14285 && BITS4(1,0,1,0) == INSN(11,8)
14286 && BITS4(1,1,0,0) == (INSN(7,4) & BITS4(1,1,0,1))) {
14297 && BITS4(0,1,1,1) == INSN(19,16)
14298 && BITS4(1,0,1,1) == INSN(11,8)
14299 && BITS4(1,1,0,0) == (INSN(7,4) & BITS4(1,1,0,1))) {
14324 && BITS4(1,0,1,0) == (INSN(19,16) & BITS4(1,0,1,0))
14466 vassert(BITS4(1,1,1,1) == INSN_COND);
14470 && BITS4(1,1,1,1) == INSN(15,12)) {
14480 && BITS4(1,1,1,1) == INSN(15,12)
14505 && BITS4(1,1,1,1) == INSN(15,12)) {
14789 case BITS4(0,1,0,0): /* ADD: Rd = Rn + shifter_operand */
14791 case BITS4(0,0,1,0): /* SUB: Rd = Rn - shifter_operand */
14793 case BITS4(0,0,1,1): /* RSB: Rd = shifter_operand - Rn */
14795 case BITS4(0,0,0,0): /* AND: Rd = Rn & shifter_operand */
14797 case BITS4(1,1,0,0): /* OR: Rd = Rn | shifter_operand */
14799 case BITS4(0,0,0,1): /* EOR: Rd = Rn ^ shifter_operand */
14801 case BITS4(1,1,1,0): /* BIC: Rd = Rn & ~shifter_operand */
14807 case BITS4(0,0,1,1):
14809 case BITS4(1,1,1,0):
14882 case BITS4(1,1,0,1): /* MOV: Rd = shifter_operand */
14883 case BITS4(1,1,1,1): { /* MVN: Rd = not(shifter_operand) */
14884 Bool isMVN = INSN(24,21) == BITS4(1,1,1,1);
14923 case BITS4(1,0,1,0): /* CMP: (void) Rn - shifter_operand */
14924 case BITS4(1,0,1,1): { /* CMN: (void) Rn + shifter_operand */
14925 Bool isCMN = INSN(24,21) == BITS4(1,0,1,1);
14949 case BITS4(1,0,0,0): /* TST: (void) Rn & shifter_operand */
14950 case BITS4(1,0,0,1): { /* TEQ: (void) Rn ^ shifter_operand */
14951 Bool isTEQ = INSN(24,21) == BITS4(1,0,0,1);
14980 case BITS4(0,1,0,1): /* ADC: Rd = Rn + shifter_operand + oldC */
14982 case BITS4(0,1,1,0): /* SBC: Rd = Rn - shifter_operand - (oldC ^ 1) */
14984 case BITS4(0,1,1,1): /* RSC: Rd = shifter_operand - Rn - (oldC ^ 1) */
15001 case BITS4(0,1,0,1): /* ADC */
15007 case BITS4(0,1,1,0): /* SBC */
15013 case BITS4(0,1,1,1): /* RSC */
15034 case BITS4(0,1,0,1): /* ADC */
15038 case BITS4(0,1,1,0): /* SBC */
15042 case BITS4(0,1,1,1): /* RSC */
15080 if ((INSN(27,24) & BITS4(1,1,0,0)) != BITS4(0,1,0,0))
15085 /**/ if (INSN(27,24) == BITS4(0,1,0,1) && INSN(21,21) == 0) {
15088 else if (INSN(27,24) == BITS4(0,1,1,1) && INSN(21,21) == 0
15092 else if (INSN(27,24) == BITS4(0,1,0,1) && INSN(21,21) == 1) {
15095 else if (INSN(27,24) == BITS4(0,1,1,1) && INSN(21,21) == 1
15099 else if (INSN(27,24) == BITS4(0,1,0,0) && INSN(21,21) == 0) {
15102 else if (INSN(27,24) == BITS4(0,1,1,0) && INSN(21,21) == 0
15307 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0))
15311 if ((INSN(7,4) & BITS4(1,0,0,1)) != BITS4(1,0,0,1))
15316 /**/ if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,21) == BITS2(1,0)) {
15319 else if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,21) == BITS2(0,0)) {
15322 else if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,21) == BITS2(1,1)) {
15325 else if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,21) == BITS2(0,1)) {
15328 else if (INSN(27,24) == BITS4(0,0,0,0) && INSN(22,21) == BITS2(1,0)) {
15331 else if (INSN(27,24) == BITS4(0,0,0,0) && INSN(22,21) == BITS2(0,0)) {
15689 && INSN(19,16) == BITS4(1,1,1,1)
15709 && INSN(15,12) == BITS4(0,0,0,0)
15710 && INSN(7,4) == BITS4(1,0,0,1)) {
15751 && INSN(15,12) == BITS4(1,1,1,1)
15752 && INSN(7,4) == BITS4(0,0,0,1)) {
15773 && INSN(15,12) == BITS4(1,1,1,1)
15774 && INSN(7,4) == BITS4(0,0,0,1)) {
15795 && INSN(7,4) == BITS4(1,0,0,1)) {
15848 && INSN(7,4) == BITS4(1,0,0,1)) {
15897 && INSN(7,4) == BITS4(1,0,0,1)) {
15949 if (BITS8(0,0,0,0,0,1,0,0) == INSN(27,20) && INSN(7,4) == BITS4(1,0,0,1)) {
16060 && BITS4(0,0,0,0) == INSN(11,8)
16061 && BITS4(1,0,0,1) == INSN(7,4)) {
16266 && BITS4(1,1,1,1) == INSN(19,16)
16267 && BITS4(0,1,1,1) == INSN(7,4)
16268 && BITS4(0,0, 0,0) == (INSN(11,8) & BITS4(0,0,1,1))) {
16270 if (subopc != BITS4(0,0,0,1) && subopc != BITS4(0,1,0,1)) {
16281 case BITS4(0,1,1,0): // UXTB
16285 case BITS4(0,0,1,0): // SXTB
16289 case BITS4(0,1,1,1): // UXTH
16293 case BITS4(0,0,1,1): // SXTH
16297 case BITS4(0,1,0,0): // UXTB16
16301 case BITS4(0,0,0,0): { // SXTB16
16333 && BITS4(0, 0,0,1) == (INSN(7,4) & BITS4(0,1,1,1))) {
16377 && BITS4(0,1,0,1) == (INSN(7,4) & BITS4(0,1,1,1))) {
16432 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0))
16436 if ((INSN(7,4) & BITS4(1,1,0,1)) != BITS4(1,1,0,1))
16441 /**/ if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,20) == BITS3(1,0,0)) {
16444 else if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,20) == BITS3(0,0,0)) {
16447 else if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,20) == BITS3(1,1,0)) {
16450 else if (INSN(27,24) == BITS4(0,0,0,1) && INSN(22,20) == BITS3(0,1,0)) {
16453 else if (INSN(27,24) == BITS4(0,0,0,0) && INSN(22,20) == BITS3(1,0,0)) {
16456 else if (INSN(27,24) == BITS4(0,0,0,0) && INSN(22,20) == BITS3(0,0,0)) {
16619 && BITS4(0,0,0,0) == (INSN(11,8) & BITS4(0,0,1,1))
16620 && BITS4(0,1,1,1) == INSN(7,4)) {
16649 && BITS4(0,0,0,0) == (INSN(11,8) & BITS4(0,0,1,1))
16650 && BITS4(0,1,1,1) == INSN(7,4)) {
16742 && INSN(15,12) == BITS4(1,1,1,1)
16743 && (INSN(7,4) & BITS4(1,1,0,1)) == BITS4(0,0,0,1)) {
16763 && INSN(15,12) != BITS4(1,1,1,1)
16764 && (INSN(7,4) & BITS4(1,1,0,1)) == BITS4(0,0,0,1)) {
16900 && INSN(7,4) == BITS4(1,0,1,1) ) {
16956 && INSN(7,4) == BITS4(1,1,1,1)) {
17012 && INSN(7,4) == BITS4(1,1,0,1)) {
17119 && INSN(7,4) == BITS4(1,0,1,1) ) {
19172 case BITS4(1,1,0,1): {
19437 && INSN1(11,8) == BITS4(1,1,1,1)) {
19459 && INSN1(11,8) == BITS4(1,1,1,1)) {
19656 && ( INSN0(8,5) == BITS4(1,0,0,0) // add subopc
19657 || INSN0(8,5) == BITS4(1,1,0,1) // sub subopc
19658 || INSN0(8,5) == BITS4(1,1,1,0)) // rsb subopc
19670 if (!valid && INSN0(8,5) == BITS4(1,0,0,0) // add
19676 if (!valid && INSN0(8,5) == BITS4(1,1,0,1) // sub
19685 case BITS4
19686 case BITS4(1,1,0,1): op = Iop_Sub32; nm = "sub"; break;
19687 case BITS4(1,1,1,0): op = Iop_Sub32; nm = "rsb";
19734 && ( INSN0(8,5) == BITS4(1,0,1,0) // adc subopc
19735 || INSN0(8,5) == BITS4(1,0,1,1)) // sbc subopc
19764 case BITS4(1,0,1,0): // ADC
19775 case BITS4(1,0,1,1): // SBC
19802 && ( INSN0(8,5) == BITS4(0,0,0,0) // and subopc
19803 || INSN0(8,5) == BITS4(0,0,1,0) // orr subopc
19804 || INSN0(8,5) == BITS4(0,1,0,0) // eor subopc
19805 || INSN0(8,5) == BITS4(0,0,0,1) // bic subopc
19806 || INSN0(8,5) == BITS4(0,0,1,1)) // orn subopc
19816 case BITS4(0,0,0,0): op = Iop_And32; nm = "and"; break;
19817 case BITS4(0,0,1,0): op = Iop_Or32; nm = "orr"; break;
19818 case BITS4(0,1,0,0): op = Iop_Xor32; nm = "eor"; break;
19819 case BITS4(0,0,0,1): op = Iop_And32; nm = "bic";
19821 case BITS4(0,0,1,1): op = Iop_Or32; nm = "orn";
19870 && INSN1(15,12) == BITS4(1,1,1,1)
19871 && INSN1(7,4) == BITS4(0,0,0,0)) {
19951 && INSN1(11,8) == BITS4(1,1,1,1)) {
19992 && INSN1(11,8) == BITS4(1,1,1,1)) {
20024 && INSN0(3,0) == BITS4(1,1,1,1)
20858 && INSN1(15,12) == BITS4(1,1,1,1)
20980 && INSN1(7,4) == BITS4(0,0,0,0)) {
21001 && ( INSN1(7,4) == BITS4(0,0,0,0) // MLA
21002 || INSN1(7,4) == BITS4(0,0,0,1))) { // MLS
21009 Bool isMLA = INSN1(7,4) == BITS4(0,0,0,0);
21043 && INSN1(7,4) == BITS4(0,0,0,0)) {
21075 if (INSN0(15,4) == 0xFBE && INSN1(7,4) == BITS4(0,1,1,0)) {
21111 && INSN1(15,12) == BITS4(1,1,1,1)
21218 && INSN1(15,12) == BITS4(1,1,1,1)
21247 && INSN1(15,12) == BITS4(1,1,1,1)
21274 && INSN1(15,12) == BITS4(1,1,1,1)
21275 && INSN1(7,4) == BITS4(1,0,0,0)) {
21296 && INSN1(15,12) == BITS4(1,1,1,1)
21297 && INSN1(7,4) == BITS4(1,0,1,0)) {
21314 && INSN1(15,12) == BITS4(1,1,1,1)
21315 && ( INSN1(7,4) == BITS4(1,0,0,0) // REV
21316 || INSN1(7,4) == BITS4(1,0,0,1))) { // REV16
21320 Bool isREV = INSN1(7,4) == BITS4(1,0,0,0);
21333 && INSN1(15,12) == BITS4(1,1,1,1)
21334 && INSN1(7,4) == BITS4(1,0,1,1)) {
21367 && INSN1(15,12) == BITS4(1,0,0,0) && INSN1(9,0) == 0x000) {
21383 && INSN1(15,12) == BITS4(1,0,0,0) && INSN1(7,0) == 0x00) {
21394 if (INSN0(15,4) == 0xE85 && INSN1(11,8) == BITS4(1,1,1,1)) {
21516 if (INSN0(15,4) == 0xE8C && INSN1(7,4) == BITS4(0,1,1,1)) {
21673 && INSN1(11,8) == BITS4(1,1,1,0)) {
21696 && INSN1(11,8) == BITS4(1,1,1,0)) {
21717 && INSN1(11,8) == BITS4(1,1,1,0)) {
21739 && INSN1(11,8) == BITS4(1,1,1,0)) {
21768 && INSN1(11,8) == BITS4(1,1,1,0)) {
21797 && INSN1(11,8) == BITS4(1,1,1,0)) {
21819 && INSN1(11,8) == BITS4(1,1,1,0)) {
21843 && INSN1(11,8) == BITS4(1,1,1,0)) {
21867 && INSN1(15,12) == BITS4(1,1,1,1)) {
21896 && INSN1(15,12) == BITS4(1,1,1,1)) {
21907 if (INSN0(15,12) == BITS4(1,1,1,0)) {
