Lines Matching refs:Alu32R
645 i->Ain.Alu32R.op = op;
646 i->Ain.Alu32R.src = src;
647 i->Ain.Alu32R.dst = dst;
1081 vex_printf("%sl ", showAMD64AluOp(i->Ain.Alu32R.op));
1082 ppAMD64RMI_lo32(i->Ain.Alu32R.src);
1084 ppHRegAMD64_lo32(i->Ain.Alu32R.dst);
1435 vassert(i->Ain.Alu32R.op != Aalu_MOV);
1436 addRegUsage_AMD64RMI(u, i->Ain.Alu32R.src);
1437 if (i->Ain.Alu32R.op == Aalu_CMP) {
1438 addHRegUse(u, HRmRead, i->Ain.Alu32R.dst);
1441 addHRegUse(u, HRmModify, i->Ain.Alu32R.dst);
1749 mapRegs_AMD64RMI(m, i->Ain.Alu32R.src);
1750 mapReg(m, &i->Ain.Alu32R.dst);
2666 switch (i->Ain.Alu32R.op) {
2681 switch (i->Ain.Alu32R.src->tag) {
2683 if (sameHReg(i->Ain.Alu32R.dst, hregAMD64_RAX())
2684 && !fits8bits(i->Ain.Alu32R.src->Armi.Imm.imm32)) {
2687 p = emit32(p, i->Ain.Alu32R.src->Armi.Imm.imm32);
2689 if (fits8bits(i->Ain.Alu32R.src->Armi.Imm.imm32)) {
2690 rex = clearWBit( rexAMode_R_enc_reg( 0, i->Ain.Alu32R.dst ) );
2693 p = doAMode_R_enc_reg(p, subopc_imm, i->Ain.Alu32R.dst);
2694 *p++ = toUChar(0xFF & i->Ain.Alu32R.src->Armi.Imm.imm32);
2696 rex = clearWBit( rexAMode_R_enc_reg( 0, i->Ain.Alu32R.dst) );
2699 p = doAMode_R_enc_reg(p, subopc_imm, i->Ain.Alu32R.dst);
2700 p = emit32(p, i->Ain.Alu32R.src->Armi.Imm.imm32);
2705 rexAMode_R( i->Ain.Alu32R.src->Armi.Reg.reg,
2706 i->Ain.Alu32R.dst) );
2709 p = doAMode_R(p, i->Ain.Alu32R.src->Armi.Reg.reg,
2710 i->Ain.Alu32R.dst);
2714 rexAMode_M( i->Ain.Alu32R.dst,
2715 i->Ain.Alu32R.src->Armi.Mem.am) );
2718 p = doAMode_M(p, i->Ain.Alu32R.dst,
2719 i->Ain.Alu32R.src->Armi.Mem.am);
