Lines Matching defs:fpsr
2803 HReg fpsr = newVRegI(env);
2804 /* Clear FPSR.Q, do the operation, and return both its
2805 result and the new value of FPSR.Q. We can simply
2806 zero out FPSR since all the other bits have no relevance
2808 addInstr(env, ARM64Instr_Imm64(fpsr, 0));
2809 addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr));
2811 addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr));
2812 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27),
2816 addInstr(env, ARM64Instr_Logic(fpsr,
2817 fpsr, ril_one, ARM64lo_AND));
2819 of |dst|, and the Q bit at the bottom of |fpsr|.
2821 produces a 128 bit value, dst[63:0]:fpsr[63:0],
2824 addInstr(env, ARM64Instr_VQfromX(scratch, fpsr));
3456 HReg fpsr = newVRegI(env);
3479 /* Clear FPSR.Q, do the operation, and return both its result
3480 and the new value of FPSR.Q. We can simply zero out FPSR
3483 addInstr(env, ARM64Instr_Imm64(fpsr, 0));
3484 addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr));
3486 addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr));
3487 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27),
3491 addInstr(env, ARM64Instr_Logic(fpsr, fpsr, ril_one, ARM64lo_AND));
3493 Q bit at the bottom of |fpsr|. */
3494 addInstr(env, ARM64Instr_VQfromX(resHi, fpsr));
