Lines Matching full:addinstr
132 static void addInstr ( ISelEnv* env, ARM64Instr* instr )
266 addInstr(env, ARM64Instr_Arith(r, hregARM64_X21(),
282 addInstr(env, ARM64Instr_Logic(dst, src, mask, ARM64lo_AND));
292 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL));
293 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SAR));
303 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL));
304 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SHR));
314 addInstr(env, ARM64Instr_Shift(dst, src, n32, ARM64sh_SHL));
315 addInstr(env, ARM64Instr_Shift(dst, dst, n32, ARM64sh_SAR));
325 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL));
326 addInstr(env, ARM64Instr_Shift(dst, dst, n56, ARM64sh_SAR));
334 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL));
335 addInstr(env, ARM64Instr_Shift(dst, dst, n56, ARM64sh_SHR));
430 addInstr(env, ARM64Instr_Shift(tL, irrm, ARM64RI6_I6(1), ARM64sh_SHL));
431 addInstr(env, ARM64Instr_Shift(tR, irrm, ARM64RI6_I6(1), ARM64sh_SHR));
432 addInstr(env, ARM64Instr_Logic(tL, tL, ril_two, ARM64lo_AND));
433 addInstr(env, ARM64Instr_Logic(tR, tR, ril_one, ARM64lo_AND));
434 addInstr(env, ARM64Instr_Logic(t3, tL, ARM64RIL_R(tR), ARM64lo_OR));
435 addInstr(env, ARM64Instr_Shift(t3, t3, ARM64RI6_I6(22), ARM64sh_SHL));
436 addInstr(env, ARM64Instr_FPCR(True/*toFPCR*/, t3));
579 addInstr(env, ARM64Instr_AddToSP(-16));
580 addInstr(env, ARM64Instr_FromSP(r_vecRetAddr));
650 addInstr(env, ARM64Instr_MovI( argregs[nextArgReg],
656 addInstr(env, ARM64Instr_MovI( argregs[nextArgReg],
726 addInstr( env, ARM64Instr_MovI( argregs[i], tmpregs[i] ) );
774 addInstr(env, ARM64Instr_Call( cc, target, nextArgReg, *retloc ));
1313 addInstr(env, ARM64Instr_Test(rTmp, one));
1335 addInstr(env, ARM64Instr_Test(rTmp, one));
1345 addInstr(env, ARM64Instr_Test(r1, xFF));
1355 addInstr(env, ARM64Instr_Test(r1, xFFFF));
1365 addInstr(env, ARM64Instr_Cmp(r1, zero, True/*is64*/));
1375 addInstr(env, ARM64Instr_Cmp(r1, zero, False/*!is64*/));
1389 addInstr(env, ARM64Instr_Cmp(argL, argR, True/*is64*/));
1411 addInstr(env, ARM64Instr_Cmp(argL, argR, False/*!is64*/));
1464 addInstr(env, ARM64Instr_LdSt64(True/*isLoad*/, dst, amode));
1469 addInstr(env, ARM64Instr_LdSt32(True/*isLoad*/, dst, amode));
1474 addInstr(env, ARM64Instr_LdSt16(True/*isLoad*/, dst, amode));
1479 addInstr(env, ARM64Instr_LdSt8(True/*isLoad*/, dst, amode));
1500 addInstr(env, ARM64Instr_Unary(dst, argR, ARM64un_NEG));
1517 addInstr(env, ARM64Instr_Arith(dst, argL, argR, isAdd));
1533 addInstr(env, ARM64Instr_Logic(dst, argL, argR, lop));
1549 addInstr(env, ARM64Instr_Shift(dst, argL, argR, sop));
1559 addInstr(env, ARM64Instr_Shift(dst, dst, argR, ARM64sh_SHR));
1570 addInstr(env, ARM64Instr_Mul(dst, argL, argR, ARM64mul_PLAIN));
1582 addInstr(env, ARM64Instr_Mul(dst, extL, extR, ARM64mul_PLAIN));
1592 addInstr(env, ARM64Instr_Cmp(argL, ARM64RIA_R(argR), False/*!is64*/));
1593 addInstr(env, ARM64Instr_CSel(dst, argL, argR, ARM64cc_CS));
1602 addInstr(env, ARM64Instr_Shift(hi32, hi32s, ARM64RI6_I6(32),
1604 addInstr(env, ARM64Instr_Logic(hi32, hi32, ARM64RIL_R(lo32),
1617 addInstr(env, (isD ? ARM64Instr_VCmpD : ARM64Instr_VCmpS)(dL, dR));
1618 addInstr(env, ARM64Instr_Imm64(dst, 0));
1619 addInstr(env, ARM64Instr_Imm64(imm, 0x40)); // 0x40 = Ircr_EQ
1620 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_EQ));
1621 addInstr(env, ARM64Instr_Imm64(imm, 0x01)); // 0x01 = Ircr_LT
1622 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_MI));
1623 addInstr(env, ARM64Instr_Imm64(imm, 0x00)); // 0x00 = Ircr_GT
1624 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_GT));
1625 addInstr(env, ARM64Instr_Imm64(imm, 0x45)); // 0x45 = Ircr_UN
1626 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_VS));
1681 addInstr(env, ARM64Instr_VCvtF2I(cvt_op, dst, src, armrm));
1705 addInstr(env, ARM64Instr_MovI(hregARM64_X0(), regL));
1706 addInstr(env, ARM64Instr_MovI(hregARM64_X1(), regR));
1707 addInstr(env, ARM64Instr_Call( ARM64cc_AL, (Addr)fn,
1709 addInstr(env, ARM64Instr_MovI(res, hregARM64_X0()));
1736 addInstr(env, ARM64Instr_LdSt32(True/*isLoad*/, dst, am));
1753 addInstr(env, ARM64Instr_LdSt8(True/*isLoad*/, dst, am));
1788 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NOT));
1794 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_CLZ));
1804 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NEG));
1805 addInstr
1814 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NEG));
1815 addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src),
1817 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63),
1827 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NEG));
1828 addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src),
1830 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63),
1838 addInstr(env, ARM64Instr_VXfromQ(dst, src, laneNo));
1844 addInstr(env, ARM64Instr_VXfromDorS(dst, src, True/*fromD*/));
1850 addInstr(env, ARM64Instr_VXfromDorS(dst, src, False/*!fromD*/));
1861 addInstr(env, ARM64Instr_Imm64(zero, 0));
1862 addInstr(env, ARM64Instr_Imm64(one, 1));
1864 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc));
1865 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63),
1867 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63),
1917 addInstr(env, ARM64Instr_VNarrowV(op, dszBlg2, tmp, src));
1918 addInstr(env, ARM64Instr_VXfromQ(dst, tmp, 0/*laneNo*/));
1928 addInstr(env, ARM64Instr_Logic(dst, src, one, ARM64lo_AND));
1933 addInstr(env, ARM64Instr_Imm64(zero, 0));
1934 addInstr(env, ARM64Instr_Imm64(one, 1));
1936 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc));
1960 addInstr(env, ARM64Instr_LdSt64(True/*isLoad*/, dst, am));
1968 addInstr(env, ARM64Instr_LdSt32(True/*isLoad*/, dst, am));
1976 addInstr(env, ARM64Instr_LdSt16(True/*isLoad*/, dst, am));
1984 addInstr(env, ARM64Instr_LdSt8(True/*isLoad*/, dst, am));
2012 addInstr(env, ARM64Instr_MovI(dst, hregARM64_X0()));
2030 addInstr(env, ARM64Instr_Imm64(dst, u));
2043 addInstr(env, ARM64Instr_CSel(dst, r1, r0, cc));
2100 addInstr(env, ARM64Instr_Mul(dstLo, argL, argR,
2102 addInstr(env, ARM64Instr_Mul(dstHi, argL, argR,
2153 addInstr(env, ARM64Instr_VImmQ(res, con));
2156 addInstr(env, ARM64Instr_VImmQ(res, 0x000F));
2157 addInstr(env, ARM64Instr_VExtV(res, res, res, 12));
2160 addInstr(env, ARM64Instr_VImmQ(res, 0x000F));
2161 addInstr(env, ARM64Instr_VExtV(res, res, res, 8));
2164 addInstr(env, ARM64Instr_VImmQ(res, 0x00FF));
2165 addInstr(env, ARM64Instr_VExtV(res, res, res, 12));
2168 addInstr(env, ARM64Instr_VImmQ(res, 0x000F));
2169 addInstr(env, ARM64Instr_VExtV(res, res, res, 4));
2170 addInstr(env, ARM64Instr_VUnaryV(ARM64vecu_NOT, res, res));
2173 addInstr(env, ARM64Instr_VImmQ(res, 0x000F));
2174 addInstr(env, ARM64Instr_VExtV(res, res, res, 4));
2177 addInstr(env, ARM64Instr_VImmQ(res, 0x00FF));
2178 addInstr(env, ARM64Instr_VExtV(res, res, res, 8));
2191 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, res, rN));
2201 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, res, addr));
2222 addInstr(env, ARM64Instr_VImmQ(imm, imm16));
2223 addInstr(env, ARM64Instr_VBinV(ARM64vecb_AND, res, src, imm));
2294 addInstr(env, ARM64Instr_VUnaryV(op, res, arg));
2314 addInstr(env, ARM64Instr_VImmQ(zero, 0x0000));
2315 addInstr(env, ARM64Instr_VBinV(cmp, res, arg, zero));
2316 addInstr(env, ARM64Instr_VUnaryV(ARM64vecu_NOT, res, res));
2328 addInstr(env, ARM64Instr_VQfromX(res, arg));
2334 addInstr(env, ARM64Instr_VQfromX(res, arg));
2335 addInstr(env, ARM64Instr_VBinV(ARM64vecb_ZIP18x16, res, res, res));
2336 addInstr(env, ARM64Instr_VShiftImmV(ARM64vecshi_SSHR16x8,
2343 addInstr(env, ARM64Instr_VQfromX(res, arg));
2344 addInstr(env, ARM64Instr_VBinV(ARM64vecb_ZIP116x8, res, res, res));
2345 addInstr(env, ARM64Instr_VShiftImmV(ARM64vecshi_SSHR32x4,
2352 addInstr(env, ARM64Instr_VQfromX(res, arg));
2353 addInstr(env, ARM64Instr_VBinV(ARM64vecb_ZIP132x4, res, res, res));
2354 addInstr(env, ARM64Instr_VShiftImmV(ARM64vecshi_SSHR64x2,
2374 addInstr(env, ARM64Instr_VUnaryV(op, res, arg));
2381 addInstr(env, ARM64Instr_VQfromXX(res, argL, argR));
2578 addInstr(env, ARM64Instr_VBinV(op, res, argR, argL));
2580 addInstr(env, ARM64Instr_VBinV(op, res, argL, argR));
2613 addInstr(env, ARM64Instr_VMov(16, res, argR));
2614 addInstr(env, ARM64Instr_VModifyV(op, res, argL));
2700 addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
2808 addInstr(env, ARM64Instr_Imm64(fpsr, 0));
2809 addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr));
2810 addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
2811 addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr));
2812 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27),
2816 addInstr(env, ARM64Instr_Logic(fpsr,
2824 addInstr(env, ARM64Instr_VQfromX(scratch, fpsr));
2825 addInstr(env, ARM64Instr_VBinV(ARM64vecb_UZP164x2,
2861 addInstr(env, ARM64Instr_VImmQ(srcZ, 0x0000));
2866 addInstr(env, ARM64Instr_VExtV(dst, src/*lo*/, srcZ/*hi*/,
2869 addInstr(env, ARM64Instr_VExtV(dst, srcZ/*lo*/, src/*hi*/,
2907 addInstr(env, ARM64Instr_VQfromXX(vSrcL, iSrcL, iSrcL));
2908 addInstr(env, ARM64Instr_VQfromXX(vSrcR, iSrcR, iSrcR));
2909 addInstr(env, ARM64Instr_VBinV(op, dst, vSrcL, vSrcR));
2938 addInstr(env, ARM64Instr_VBinV(vecbop, dst, argL, argR));
2957 addInstr(env, ARM64Instr_VExtV(dst, srcLo, srcHi, amt));
3008 addInstr(env, ARM64Instr_Imm64(src, con->Ico.F64i));
3009 addInstr(env, ARM64Instr_VDfromX(dst, src));
3018 addInstr(env, ARM64Instr_Imm64(src, u.u64));
3019 addInstr(env, ARM64Instr_VDfromX(dst, src));
3028 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, res, addr, 0));
3037 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, rD, rN, offs));
3047 addInstr(env, ARM64Instr_VUnaryD(ARM64fpu_NEG, dst, src));
3053 addInstr(env, ARM64Instr_VUnaryD(ARM64fpu_ABS, dst, src));
3059 addInstr(env, ARM64Instr_VCvtSD(True/*sToD*/, dst, src));
3065 addInstr(env, ARM64Instr_VCvtHD(True/*hToD*/, dst, src));
3077 addInstr(env, ARM64Instr_VCvtI2F(cvt_op, dst, src));
3100 addInstr(env, ARM64Instr_VUnaryD(op, dst, src));
3110 addInstr(env, ARM64Instr_VCvtI2F(cvt_op, dstS, srcI));
3133 addInstr(env, ARM64Instr_VBinD(dblop, dst, argL, argR));
3145 addInstr(env, ARM64Instr_VFCSel(dst, r1, r0, cc, True/*64-bit*/));
3195 addInstr(env, ARM64Instr_Imm64(src, 0));
3196 addInstr(env, ARM64Instr_VDfromX(dst, src));
3205 addInstr(env, ARM64Instr_Imm64(src, (ULong)u.u32));
3206 addInstr(env, ARM64Instr_VDfromX(dst, src));
3215 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, res, addr, 0));
3224 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, rD, rN, offs));
3234 addInstr(env, ARM64Instr_VUnaryS(ARM64fpu_NEG, dst, src));
3240 addInstr(env, ARM64Instr_VUnaryS(ARM64fpu_ABS, dst, src));
3246 addInstr(env, ARM64Instr_VCvtHS(True/*hToS*/, dst, src));
3269 addInstr(env, ARM64Instr_VUnaryS(op, dst, src));
3276 addInstr(env, ARM64Instr_VCvtSD(False/*!sToD*/, dstS, srcD));
3294 addInstr(env, ARM64Instr_VCvtI2F(cvt_op, dstS, srcI));
3317 addInstr(env, ARM64Instr_VBinS(sglop, dst, argL, argR));
3329 addInstr(env, ARM64Instr_VFCSel(dst, r1, r0, cc, False/*!64-bit*/));
3371 addInstr(env, ARM64Instr_VLdStH(True/*isLoad*/, rD, rN, offs));
3382 addInstr(env, ARM64Instr_VCvtHS(False/*!hToS*/, dstH, srcS));
3389 addInstr(env, ARM64Instr_VCvtHD(False/*!hToD*/, dstH, srcD));
3483 addInstr(env, ARM64Instr_Imm64(fpsr, 0));
3484 addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr));
3485 addInstr(env, ARM64Instr_VBinV(op, resLo, argL, argR));
3486 addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr));
3487 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27),
3491 addInstr(env, ARM64Instr_Logic(fpsr, fpsr, ril_one, ARM64lo_AND));
3494 addInstr(env, ARM64Instr_VQfromX(resHi, fpsr));
3537 addInstr(env, ARM64Instr_LdSt64(False/*!isLoad*/, rD, am));
3543 addInstr(env, ARM64Instr_LdSt32(False/*!isLoad*/, rD, am));
3549 addInstr(env, ARM64Instr_LdSt16(False/*!isLoad*/, rD, am));
3555 addInstr(env, ARM64Instr_LdSt8(False/*!isLoad*/, rD, am));
3561 addInstr(env, ARM64Instr_VLdStQ(False/*!isLoad*/, qD, addr));
3567 addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, addr, 0));
3573 addInstr(env, ARM64Instr_VLdStS(False/*!isLoad*/, sD, addr, 0));
3587 addInstr(env, ARM64Instr_LdSt64(False/*!isLoad*/, rD, am));
3593 addInstr(env, ARM64Instr_LdSt32(False/*!isLoad*/, rD, am));
3599 addInstr(env, ARM64Instr_LdSt16(False/*!isLoad*/, rD, am));
3605 addInstr(env, ARM64Instr_LdSt8(False/*!isLoad*/, rD, am));
3611 addInstr(env, ARM64Instr_VLdStQ(False/*!isLoad*/, qD, addr));
3617 addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, bbp, offs));
3623 addInstr(env, ARM64Instr_VLdStS(False/*!isLoad*/, sD, bbp, offs));
3629 addInstr(env, ARM64Instr_VLdStH(False/*!isLoad*/, hD, bbp, offs));
3646 addInstr(env, ARM64Instr_MovI(dst, rD));
3663 addInstr(env, ARM64Instr_Imm64(zero, 0));
3664 addInstr(env, ARM64Instr_Imm64(one, 1));
3666 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc));
3672 addInstr(env, ARM64Instr_VMov(8, dst, src));
3678 addInstr(env, ARM64Instr_VMov(8/*yes, really*/, dst, src));
3684 addInstr(env, ARM64Instr_VMov(16, dst, src));
3691 addInstr(env, ARM64Instr_VMov(16, dstHi, srcHi));
3692 addInstr(env, ARM64Instr_VMov(16, dstLo, srcLo));
3743 addInstr(env, ARM64Instr_MovI(dst, hregARM64_X0()) );
3757 addInstr(env, ARM64Instr_FromSP(tmp)); // tmp = SP
3758 addInstr(env, ARM64Instr_Arith(tmp, tmp,
3761 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, dst, tmp));
3762 addInstr(env, ARM64Instr_AddToSP(addToSp));
3790 addInstr(env, ARM64Instr_MovI(hregARM64_X4(), raddr));
3791 addInstr(env, ARM64Instr_LdrEX(szB));
3792 addInstr(env, ARM64Instr_MovI(r_dst, hregARM64_X2()));
3811 addInstr(env, ARM64Instr_MovI(hregARM64_X2(), rD));
3812 addInstr(env, ARM64Instr_MovI(hregARM64_X4(), rA));
3813 addInstr(env, ARM64Instr_StrEX(szB));
3826 addInstr(env, ARM64Instr_Logic(r_res, hregARM64_X0(), one,
3829 addInstr(env, ARM64Instr_Logic(r_res, r_res, one,
3840 addInstr(env, ARM64Instr_MFence());
3881 addInstr(env, ARM64Instr_XDirect(stmt->Ist.Exit.dst->Ico.U64,
3888 addInstr(env, ARM64Instr_XAssisted(r, amPC, cc, Ijk_Boring));
3905 addInstr(env, ARM64Instr_XAssisted(r, amPC, cc,
3954 addInstr(env, ARM64Instr_XDirect(cdst->Ico.U64,
3962 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL,
3975 addInstr(env, ARM64Instr_XIndir(r, amPC, ARM64cc_AL));
3977 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL,
4000 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL, jk));
4107 addInstr(env, ARM64Instr_EvCheck(amCounter, amFailAddr));
4114 addInstr(env, ARM64Instr_ProfInc());
