Lines Matching full:addinstr
160 static void addInstr(ISelEnv * env, MIPSInstr * instr)
198 addInstr(env, MIPSInstr_Alu(Malu_DADD, sp, sp, MIPSRH_Imm(True,
201 addInstr(env, MIPSInstr_Alu(Malu_ADD, sp, sp, MIPSRH_Imm(True,
210 addInstr(env, MIPSInstr_Alu(Malu_DSUB, sp, sp,
213 addInstr(env, MIPSInstr_Alu(Malu_SUB, sp, sp,
290 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, irrm,
292 addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
293 addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp, MIPSRH_Imm(False, 3)));
295 addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
300 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64));
303 addInstr(env, MIPSInstr_MtFCSR(irrm));
313 addInstr(env, MIPSInstr_Load(4, fcsr, am_addr, mode64));
318 addInstr(env, MIPSInstr_MtFCSR(fcsr));
369 addInstr(env, MIPSInstr_Store(4, am_addr0, r_srcLo, mode64));
370 addInstr(env, MIPSInstr_Store(4, am_addr1, r_srcHi, mode64));
372 addInstr(env, MIPSInstr_Store(4, am_addr0, r_srcHi, mode64));
373 addInstr(env, MIPSInstr_Store(4, am_addr1, r_srcLo, mode64));
381 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, fr_dst, am_addr0));
523 addInstr(env, mk_iMOVds_RR(argregs[argreg],
534 addInstr(env, mk_iMOVds_RR( argregs[argreg++], rHi ));
536 addInstr(env, mk_iMOVds_RR( argregs[argreg], rLo));
540 addInstr(env, mk_iMOVds_RR(argregs[argreg],
607 addInstr(env, mk_iMOVds_RR(argregs[i], tmpregs[i]));
650 addInstr(env, MIPSInstr_CallAlways(cc, target, argiregs,
653 addInstr(env, MIPSInstr_Call(cc, target, argiregs, src, *retloc));
816 addInstr(env, MIPSInstr_Load(toUChar(sizeofIRType(ty)),
898 addInstr(env, MIPSInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR));
944 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tmp,
946 addInstr
949 addInstr(env, MIPSInstr_Shft(shftOp, True /*32bit shift */,
952 addInstr(env, MIPSInstr_Shft(shftOp, True /*32bit shift */,
956 addInstr(env, MIPSInstr_Shft(shftOp, False/*64bit shift */,
1045 addInstr(env, MIPSInstr_Cmp(syned, size32, dst, r1, r2, cc));
1061 addInstr(env, MIPSInstr_Alu(Malu_SLT, tmp, argL, argRH));
1062 addInstr(env, mk_iMOVds_RR(r_dst, argL));
1063 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, r_dst, argR, tmp));
1072 addInstr(env, MIPSInstr_Mul(False/*Unsigned or Signed */ ,
1092 addInstr(env, MIPSInstr_Mul(syned /*Unsigned or Signed */ ,
1097 addInstr(env, MIPSInstr_Mfhi(tHi));
1098 addInstr(env, MIPSInstr_Mflo(tLo));
1100 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1,
1103 addInstr(env, MIPSInstr_LI(mask, 0xffffffff));
1104 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1107 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1131 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP_EQ, tmp, r_srcL, r_srcR));
1132 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_ccMIPS, tmp,
1135 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP_UN, tmp, r_srcL, r_srcR));
1136 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS,
1139 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP_LT, tmp, r_srcL, r_srcR));
1140 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp,
1142 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS,
1145 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP_NGT,
1147 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, tmp,
1150 addInstr(env, MIPSInstr_Alu(Malu_NOR, tmp, tmp, MIPSRH_Reg(tmp)));
1151 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, tmp,
1153 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS,
1166 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_ccIR_b0, r_ccMIPS,
1168 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR_b0, r_ccMIPS,
1170 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b0, r_ccIR_b0,
1174 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_ccIR_b2, r_ccMIPS,
1176 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b2, r_ccIR_b2,
1180 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_ccIR_b6,
1182 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR_b6, r_ccMIPS,
1184 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_ccIR_b6, r_ccIR_b6,
1186 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b6, r_ccIR_b6,
1190 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR, r_ccIR_b0,
1192 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR, r_ccIR,
1210 addInstr(env, MIPSInstr_Div(syned, True, r_srcL, r_srcR));
1211 addInstr(env, MIPSInstr_Mfhi(tHi));
1212 addInstr(env, MIPSInstr_Mflo(tLo));
1214 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1, tHi,
1217 addInstr(env, MIPSInstr_LI(mask, 0xffffffff));
1218 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1221 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1252 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tHi_1, tHi,
1254 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1256 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1270 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1, tHi,
1273 addInstr(env, MIPSInstr_LI(mask, 0xffffffff));
1274 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1276 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1290 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTLS, tmpF, valF));
1295 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmfc1, valS, tmpF));
1311 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTWD, valS, valD));
1316 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mfc1, r_dst, valS));
1354 addInstr(env, mk_iMOVds_RR(hregMIPS_GPR4(env->mode64), regL));
1355 addInstr(env, mk_iMOVds_RR(hregMIPS_GPR5(env->mode64), regR));
1358 addInstr(env, MIPSInstr_CallAlways( MIPScc_AL,
1361 addInstr(env, mk_iMOVds_RR(res, hregMIPS_GPR2(env->mode64)));
1426 addInstr(env, MIPSInstr_Shft(Mshft_SLL, sz32, r_dst, r_src,
1428 addInstr(env, MIPSInstr_Shft(Mshft_SRA, sz32, r_dst, r_dst,
1439 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
1440 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
1452 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_dst, r_srcL, r_srcR));
1462 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mfc1, r_dst, fr_src));
1474 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmfc1, r_dst, fr_src));
1489 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTWD, valS, valD));
1494 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mfc1, r_dst, valS));
1508 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
1520 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1528 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
1566 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1575 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False /*!32bit shift */,
1577 addInstr(env, MIPSInstr_Shft(Mshft_SRL, False /*!32bit shift */,
1586 addInstr(env, MIPSInstr_Shft(Mshft_SRA, False /*64bit shift */,
1619 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /*!32bit shift */,
1631 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, r_src,
1633 addInstr(env, MIPSInstr_Cmp(False, True, r_dst, tmp,
1642 addInstr(env, MIPSInstr_Cmp(False, True, r_dst, r_src,
1651 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
1654 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1656 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, r_dst, r_dst,
1670 addInstr(env, MIPSInstr_Alu(op, r_dst,
1673 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1684 addInstr(env, MIPSInstr_Unary(op, r_dst, r_src));
1697 addInstr(env, MIPSInstr_Alu(Malu_OR, r_src, lo, MIPSRH_Reg(hi)));
1699 addInstr(env, MIPSInstr_Cmp(False, !(env->mode64), r_dst, r_src,
1710 addInstr(env, MIPSInstr_Alu(Malu_DSUB, tmp2, hregMIPS_GPR0(mode64),
1713 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp2, tmp2, MIPSRH_Reg(tmp1)));
1714 addInstr(env, MIPSInstr_Shft(Mshft_SRA, False, tmp2, tmp2,
1764 addInstr(env, mk_iMOVds_RR(hregMIPS_GPR4(env->mode64), regL));
1766 addInstr(env, MIPSInstr_CallAlways( MIPScc_AL,
1769 addInstr(env, mk_iMOVds_RR(res, hregMIPS_GPR2(env->mode64)));
1784 addInstr(env, MIPSInstr_Load(toUChar(sizeofIRType(ty)), r_dst, am_addr,
1803 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, r_dst, r1, r_cond));
1833 addInstr(env, MIPSInstr_LI(r_dst, (ULong) l));
1857 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
2122 addInstr(env, MIPSInstr_Cmp(syned, size32, dst, r1, r2, cc));
2126 addInstr(env, MIPSInstr_Store(4,
2137 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
2138 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
2142 addInstr(env, MIPSInstr_Store(4,
2153 addInstr(env, MIPSInstr_Store(4,
2210 addInstr(env, MIPSInstr_Mul(syned, True, False /*64bit mul */ ,
2212 addInstr(env, MIPSInstr_Mfhi(tHi));
2213 addInstr(env, MIPSInstr_Mflo(tLo));
2232 addInstr(env, MIPSInstr_Div(syned, False, r_srcL, r_srcR));
2233 addInstr(env, MIPSInstr_Mfhi(tHi));
2234 addInstr(env, MIPSInstr_Mflo(tLo));
2251 addInstr(env, MIPSInstr_Div(syned, False, rLo1, r_srcR));
2252 addInstr(env, MIPSInstr_Mfhi(tHi));
2253 addInstr(env, MIPSInstr_Mflo(tLo));
2302 addInstr(env, MIPSInstr_Load(4, tHi, MIPSAMode_IR(0, r_addr), mode64));
2303 addInstr(env, MIPSInstr_Load(4, tLo, MIPSAMode_IR(4, r_addr), mode64));
2320 addInstr(env, MIPSInstr_LI(tLo, (ULong) wLo));
2324 addInstr(env, MIPSInstr_LI(tHi, (ULong) wHi));
2325 addInstr(env, MIPSInstr_LI(tLo, (ULong) wLo));
2340 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2341 addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeInt(am_addr), mode64));
2365 addInstr(env, mk_iMOVds_RR(desLo, expr0Lo));
2366 addInstr(env, mk_iMOVds_RR(desHi, expr0Hi));
2367 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, desLo, expr1Lo, cond));
2368 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, desHi, expr1Hi, cond));
2395 addInstr(env, MIPSInstr_Alu(Malu_ADD, tLo, xLo, MIPSRH_Reg(yLo)));
2398 addInstr(env, MIPSInstr_Cmp(False, size32, carryBit, tLo, xLo, cc));
2400 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi1, xHi, MIPSRH_Reg(yHi)));
2401 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, tHi1,
2421 addInstr(env, MIPSInstr_Alu(Malu_SUB, tLo, xLo, MIPSRH_Reg(yLo)));
2424 addInstr(env, MIPSInstr_Cmp(False, size32, borrow, xLo, yLo, cc));
2426 addInstr(env, MIPSInstr_Alu(Malu_ADD, yHi, yHi,
2428 addInstr(env, MIPSInstr_Alu(Malu_SUB, tHi, xHi, MIPSRH_Reg(yHi)));
2443 addInstr(env, MIPSInstr_Mul(syned /*Unsigned or Signed */,
2446 addInstr(env, MIPSInstr_Mfhi(tHi));
2447 addInstr(env, MIPSInstr_Mflo(tLo));
2462 addInstr(env, MIPSInstr_Div(syned, True, r_sLo, r_srcR));
2463 addInstr(env, MIPSInstr_Mfhi(tHi));
2464 addInstr(env, MIPSInstr_Mflo(tLo));
2488 addInstr(env, MIPSInstr_Alu(op, tHi, xHi, MIPSRH_Reg(yHi)));
2489 addInstr(env, MIPSInstr_Alu(op, tLo, xLo, MIPSRH_Reg(yLo)));
2523 addInstr(env, MIPSInstr_LI(a2, sa->Mrh.Imm.imm16));
2526 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg,
2530 addInstr(env, MIPSInstr_LI(zero, 0x00000000));
2532 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2)));
2534 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2537 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2540 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2543 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2546 addInstr(env, MIPSInstr_Alu(Malu_AND, a0tmp, a2,
2549 addInstr(env, MIPSInstr_Alu(Malu_OR, v0, a3, MIPSRH_Reg(v0)));
2552 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, v0, v1, a0tmp));
2554 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, v1, zero, a0tmp));
2587 addInstr(env, MIPSInstr_LI(a2, sa->Mrh.Imm.imm16));
2590 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg,
2594 addInstr(env, MIPSInstr_LI(zero, 0x00000000));
2596 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2)));
2598 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2601 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2604 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2607 addInstr(env, MIPSInstr_Alu(Malu_AND, v0, a2,
2610 addInstr(env, MIPSInstr_Alu(Malu_OR, v1, a3, MIPSRH_Reg(v1)));
2612 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2616 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, v1, a2tmp, v0));
2618 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, a2tmp, zero, v0));
2620 addInstr(env, mk_iMOVds_RR(v0, a2tmp));
2655 addInstr(env, MIPSInstr_LI(a2, sa->Mrh.Imm.imm16));
2658 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg,
2662 addInstr(env, MIPSInstr_LI(zero, 0x00000000));
2664 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2)));
2666 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2669 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2672 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2675 addInstr(env, MIPSInstr_Alu(Malu_AND, v0, a2,
2678 addInstr(env, MIPSInstr_Alu(Malu_OR, v1, a3, MIPSRH_Reg(v1)));
2680 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2684 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, v1, a2, v0));
2686 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, a2, zero, v0));
2687 addInstr(env, mk_iMOVds_RR(v0, a2));
2723 addInstr(env, MIPSInstr_LI(a2, sa->Mrh.Imm.imm16));
2726 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg,
2730 addInstr(env, MIPSInstr_LI(zero, 0x00000000));
2732 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2)));
2734 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2737 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True /* 32bit shift */,
2740 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True /* 32bit shift */,
2743 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True /* 32bit shift */,
2746 addInstr(env, MIPSInstr_Alu(Malu_AND, a0tmp, a2,
2749 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True /* 32bit shift */,
2752 addInstr(env, MIPSInstr_Alu(Malu_OR, v0, a3, MIPSRH_Reg(v0)));
2755 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, v0, v1, a0tmp));
2757 addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, v1, a1tmp, a0tmp));
2773 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTLS, tmpD, valF));
2780 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, tmpD,
2784 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2785 addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeFloat(am_addr),
2788 addInstr(env, MIPSInstr_Load(4, tHi, am_addr, mode64));
2789 addInstr(env, MIPSInstr_Load(4, tLo, nextMIPSAModeFloat(am_addr),
2816 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, src,
2818 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp, tmp,
2821 addInstr(env, mk_iMOVds_RR(tHi, tmp));
2822 addInstr(env, mk_iMOVds_RR(tLo, tmp));
2834 addInstr(env, mk_iMOVds_RR(tHi, src));
2835 addInstr(env, mk_iMOVds_RR(tLo, src));
2836 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tHi, tHi,
2848 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo, src,
2850 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64),
2862 addInstr(env, mk_iMOVds_RR(tLo, src));
2863 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64),
2883 addInstr(env, MIPSInstr_LI(zero, 0x00000000));
2886 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, zero, MIPSRH_Reg(yLo)));
2887 addInstr(env, MIPSInstr_Cmp(False, True, tmp1, zero, tmp2, cc));
2888 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp, zero, MIPSRH_Reg(yHi)));
2889 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp1, tmp, MIPSRH_Reg(tmp1)));
2894 addInstr(env, MIPSInstr_Alu(Malu_OR, tHi, yHi, MIPSRH_Reg(tmp1)));
2895 addInstr(env, MIPSInstr_Alu(Malu_OR, tLo, yLo, MIPSRH_Reg(tmp2)));
2908 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp1, srcLo,
2912 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, hregMIPS_GPR0(mode64),
2915 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp2, tmp2, MIPSRH_Reg(tmp1)));
2916 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp2, tmp2,
2933 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
2937 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2938 addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeFloat(am_addr),
2941 addInstr(env, MIPSInstr_Load(4, tHi, am_addr, mode64));
2942 addInstr(env, MIPSInstr_Load(4, tLo, nextMIPSAModeFloat(am_addr),
2997 addInstr(env, MIPSInstr_FpLdSt(True /*load */, 8, r_dst, am_addr));
3000 addInstr(env, MIPSInstr_FpLdSt(True /*load */, 4, r_dst, am_addr));
3011 addInstr(env, MIPSInstr_FpLdSt(True /*load */, 8, r_dst, am_addr));
3014 addInstr(env, MIPSInstr_FpLdSt(True /*load */, 4, r_dst, am_addr));
3027 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, r_dst, fr_src));
3036 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDS, dst, src));
3046 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmtc1, r_dst, fr_src));
3063 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp, r_src));
3066 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp));
3075 addInstr(env, MIPSInstr_FpUnary(sz32 ? Mfp_ABSS : Mfp_ABSD, dst, src));
3083 addInstr(env, MIPSInstr_FpUnary(sz32 ? Mfp_NEGS : Mfp_NEGD, dst, src));
3090 addInstr(env, MIPSInstr_FpConvert(Mfp_TRULD, dst, src));
3097 addInstr(env, MIPSInstr_FpConvert(Mfp_ROUNDLD, dst, src));
3104 addInstr(env, MIPSInstr_FpConvert(Mfp_FLOORLD, dst, src));
3111 addInstr(env, MIPSInstr_FpConvert(Mfp_CEILLD, dst, src));
3167 addInstr(env, MIPSInstr_FpBinary(op, dst, argL, argR));
3187 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSD, valS, valD));
3197 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTWS, valS, valF));
3207 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTLD, valS, valF));
3219 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp, fr_src));
3222 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSW, r_dst, tmp));
3240 addInstr(env, MIPSInstr_Store(8, am_addr, fr_src, mode64));
3243 addInstr(env, MIPSInstr_FpLdSt(True /*load */, 8, tmp, am_addr));
3255 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDL, r_dst, tmp));
3273 addInstr(env, MIPSInstr_Store(8, am_addr, fr_src, mode64));
3276 addInstr(env, MIPSInstr_FpLdSt(True /*load */, 8, tmp, am_addr));
3288 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSL, r_dst, tmp));
3300 addInstr(env, MIPSInstr_FpUnary(sz32 ? Mfp_SQRTS : Mfp_SQRTD, dst,
3339 addInstr(env, MIPSInstr_FpTernary(op, dst,
3385 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, fsrc, zero_r1));
3387 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, fdst, zero_r1));
3401 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, r_dst, r0));
3402 addInstr(env, MIPSInstr_MoveCond(MFpMoveCond_movnd, r_dst, r1,
3438 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
3448 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
3466 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDS, dst, src));
3486 addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp, r_src));
3489 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp));
3500 addInstr(env, MIPSInstr_FpUnary(fpop, dst, src));
3512 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTLD, dst, src));
3522 addInstr(env, MIPSInstr_FpUnary(Mfp_SQRTD, dst, src));
3564 addInstr(env, MIPSInstr_FpBinary(op, dst, argL, argR));
3601 addInstr(env, MIPSInstr_FpTernary(op, dst,
3621 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, r_dst, r0));
3622 addInstr(env, MIPSInstr_MoveCond(MFpMoveCond_movnd, r_dst, r1,
3658 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(tyd)),
3668 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
3670 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
3676 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, fr_src,
3682 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
3688 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
3705 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(ty)),
3717 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
3719 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
3729 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, fr_src,
3738 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
3753 addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3761 addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3767 addInstr(env, mk_iMOVds_RR(dstHi, rHi));
3768 addInstr(env, mk_iMOVds_RR(dstLo, rLo));
3777 addInstr(env, mk_iMOVds_RR(dstHi, rHi));
3778 addInstr(env, mk_iMOVds_RR(dstLo, rLo));
3785 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVS, fr_dst, fr_src));
3793 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, dst, src));
3798 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, dst, src));
3849 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
3859 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
3867 addInstr(env, mk_iMOVds_RR(rLo, hregMIPS_GPR2(mode64)));
3868 addInstr(env, mk_iMOVds_RR(rHi, hregMIPS_GPR3(mode64)));
3870 addInstr(env, mk_iMOVds_RR(dstHi, rHi));
3871 addInstr(env, mk_iMOVds_RR(dstLo, rLo));
3885 addInstr(env, MIPSInstr_Load(mode64 ? 8 : 4, dst, am, mode64));
3917 addInstr(env, MIPSInstr_LoadL(4, r_dst, r_addr, mode64));
3920 addInstr(env, MIPSInstr_LoadL(8, r_dst, r_addr, mode64));
3933 addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3934 addInstr(env, MIPSInstr_StoreC(4, r_addr, r_dst, mode64));
3937 addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3938 addInstr(env, MIPSInstr_StoreC(8, r_addr, r_dst, mode64));
3953 addInstr(env, MIPSInstr_Cas(8, old, addr, expd, data, mode64));
3955 addInstr(env, MIPSInstr_Cas(4, old, addr, expd, data, mode64));
4001 addInstr(env, MIPSInstr_XDirect(
4010 addInstr(env, MIPSInstr_XAssisted(r, amPC, cc, Ijk_Boring));
4032 addInstr(env, MIPSInstr_XAssisted(r, amPC, cc,
4085 addInstr(env, MIPSInstr_XDirect(
4094 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL,
4108 addInstr(env, MIPSInstr_XIndir(r, amPC, MIPScc_AL));
4110 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL,
4136 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL, jk));
4267 addInstr(env, MIPSInstr_EvCheck(amCounter, amFailAddr));
4274 addInstr(env, MIPSInstr_ProfInc());
