Lines Matching full:arg1
1453 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1486 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1535 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1553 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1575 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1590 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1610 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1625 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1638 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1650 HReg r_Hi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
1682 fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1, IEndianess);
1687 fr_srcL = iselDfp64Expr(env, e->Iex.Binop.arg1, IEndianess);
1692 iselDfp128Expr(&fr_srcL, &fr_srcL_lo, env, e->Iex.Binop.arg1,
1757 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
1789 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
1814 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
1835 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
2559 iselWordExpr_R(env, e->Iex.Binop.arg1,
2566 arg1, IEndianess);
2583 iselWordExpr_R(env, e->Iex.Binop.arg1,
2590 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
2907 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
2956 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
2979 HReg arg = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
3053 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
3068 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
3134 iselInt64Expr(rHi, rMedHi, env, e->Iex.Binop.arg1, IEndianess);
3256 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1,
3280 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1, IEndianess);
3294 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1, IEndianess);
3307 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
3324 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
3351 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
3373 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
3856 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
3882 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4026 set_FPU_rounding_mode( env, e->Iex.Qop.details->arg1, IEndianess );
4051 set_FPU_rounding_mode( env, triop->arg1, IEndianess );
4066 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4077 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4091 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4119 set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4271 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4358 HReg fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1, IEndianess);
4386 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4394 PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1, IEndianess);
4407 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4415 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4446 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg1, IEndianess);
4470 HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
4479 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Binop.arg1,
4517 set_FPU_DFP_rounding_mode( env, triop->arg1, IEndianess );
4531 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1, IEndianess);
4540 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1, IEndianess);
4634 r_srcHi = iselDfp64Expr( env, e->Iex.Binop.arg1, IEndianess );
4644 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );
4663 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg1,
4679 PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1, IEndianess);
4704 HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
4761 set_FPU_DFP_rounding_mode( env, triop->arg1, IEndianess );
4777 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1, IEndianess);
4793 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1, IEndianess);
5094 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1, IEndianess);
5104 HReg rHi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);
5140 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5148 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5173 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5176 addInstr(env, PPCInstr_AvBinary(op, dst, arg1, arg2));
5205 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5208 addInstr(env, PPCInstr_AvBin8x16(op, dst, arg1, arg2));
5240 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5243 addInstr(env, PPCInstr_AvBin16x8(op, dst, arg1, arg2));
5278 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5281 addInstr(env, PPCInstr_AvBin32x4(op, dst, arg1, arg2));
5305 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5308 addInstr(env, PPCInstr_AvBin64x2(op, dst, arg1, arg2));
5315 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5326 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5337 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5348 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5359 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5368 HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5379 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5382 addInstr(env, PPCInstr_AvCipherV128Binary(op, dst, arg1, arg2));
5389 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);
5392 addInstr(env, PPCInstr_AvHashV128Binary(op, dst, arg1, s_field));
5406 HReg arg1 = iselVecExpr(env, triop->arg1, IEndianess);
5410 addInstr(env, PPCInstr_AvBCDV128Trinary(op, dst, arg1, arg2, ps));
5428 set_FPU_rounding_mode(env, triop->arg1, IEndianess);
