Lines Matching refs:isWrite
311 Bool isWrite;435 Bool acc_isW = xe->XE.Race.isWrite;470 Addr data_addr, Int szB, Bool isWrite,501 xe.XE.Race.isWrite = isWrite;503 tl_assert(isWrite == False || isWrite == True);672 && xe1->XE.Race.isWrite == xe2->XE.Race.isWrite1164 what = xe->XE.Race.isWrite ? "write" : "read";