Lines Matching refs:rdhi
3659 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3661 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3668 smlal(cond, rdlo, rdhi, rn, rm);
3670 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3671 Smlal(al, rdlo, rdhi, rn, rm);
3675 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3677 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3684 smlalbb(cond, rdlo, rdhi, rn, rm);
3686 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3687 Smlalbb(al, rdlo, rdhi, rn, rm);
3691 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3700 smlalbt(cond, rdlo, rdhi, rn, rm);
3702 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3703 Smlalbt(al, rdlo, rdhi, rn, rm);
3707 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3709 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3716 smlald(cond, rdlo, rdhi, rn, rm);
3718 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3719 Smlald(al, rdlo, rdhi, rn, rm);
3723 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3725 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3732 smlaldx(cond, rdlo, rdhi, rn, rm);
3734 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3735 Smlaldx(al, rdlo, rdhi, rn, rm);
3739 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3741 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3748 smlals(cond, rdlo, rdhi, rn, rm);
3750 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3751 Smlals(al, rdlo, rdhi, rn, rm);
3755 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3757 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3764 smlaltb(cond, rdlo, rdhi, rn, rm);
3766 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3767 Smlaltb(al, rdlo, rdhi, rn, rm);
3771 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3773 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3780 smlaltt(cond, rdlo, rdhi, rn, rm);
3782 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3783 Smlaltt(al, rdlo, rdhi, rn, rm);
3883 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3885 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3892 smlsld(cond, rdlo, rdhi, rn, rm);
3894 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3895 Smlsld(al, rdlo, rdhi, rn, rm);
3899 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3901 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3908 smlsldx(cond, rdlo, rdhi, rn, rm);
3910 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3911 Smlsldx(al, rdlo, rdhi, rn, rm);
4051 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4053 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4060 smull(cond, rdlo, rdhi, rn, rm);
4062 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4063 Smull(al, rdlo, rdhi, rn, rm);
4068 Register rdhi,
4073 Smull(cond, rdlo, rdhi, rn, rm);
4076 Smulls(cond, rdlo, rdhi, rn, rm);
4079 Smull(cond, rdlo, rdhi, rn, rm);
4085 Register rdhi,
4088 Smull(flags, al, rdlo, rdhi, rn, rm);
4092 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4094 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4101 smulls(cond, rdlo, rdhi, rn, rm);
4103 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4104 Smulls(al, rdlo, rdhi, rn, rm);
4989 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4998 umaal(cond, rdlo, rdhi, rn, rm);
5000 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5001 Umaal(al, rdlo, rdhi, rn, rm);
5005 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5014 umlal(cond, rdlo, rdhi, rn, rm);
5016 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5017 Umlal(al, rdlo, rdhi, rn, rm);
5022 Register rdhi,
5027 Umlal(cond, rdlo, rdhi, rn, rm);
5030 Umlals(cond, rdlo, rdhi, rn, rm);
5033 Umlal(cond, rdlo, rdhi, rn, rm);
5039 Register rdhi,
5042 Umlal(flags, al, rdlo, rdhi, rn, rm);
5046 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5048 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5055 umlals(cond, rdlo, rdhi, rn, rm);
5057 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5058 Umlals(al, rdlo, rdhi, rn, rm);
5062 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5064 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5071 umull(cond, rdlo, rdhi, rn, rm);
5073 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5074 Umull(al, rdlo, rdhi, rn, rm);
5079 Register rdhi,
5084 Umull(cond, rdlo, rdhi, rn, rm);
5087 Umulls(cond, rdlo, rdhi, rn, rm);
5090 Umull(cond, rdlo, rdhi, rn, rm);
5096 Register rdhi,
5099 Umull(flags, al, rdlo, rdhi, rn, rm);
5103 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5105 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5112 umulls(cond, rdlo, rdhi, rn, rm);
5114 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5115 Umulls(al, rdlo, rdhi, rn, rm);
