Lines Matching refs:VIXL_ASSERT
38 VIXL_ASSERT((1 << index) & list_);
45 VIXL_ASSERT(IsValid());
51 VIXL_ASSERT((1 << index) & list_);
82 VIXL_ASSERT(GetType() == CPURegister::kNoRegister);
83 VIXL_ASSERT(IsEmpty());
191 VIXL_ASSERT(code < kNumberOfRegisters);
201 VIXL_ASSERT(code < kNumberOfRegisters);
208 VIXL_ASSERT(code < kNumberOfVRegisters);
214 VIXL_ASSERT(code < kNumberOfVRegisters);
220 VIXL_ASSERT(code < kNumberOfVRegisters);
226 VIXL_ASSERT(code < kNumberOfVRegisters);
232 VIXL_ASSERT(code < kNumberOfVRegisters);
238 VIXL_ASSERT(code < kNumberOfVRegisters);
244 VIXL_ASSERT(IsValidRegister());
250 VIXL_ASSERT(IsValidRegister());
256 VIXL_ASSERT(IsValidVRegister());
262 VIXL_ASSERT(IsValidVRegister());
268 VIXL_ASSERT(IsValidVRegister());
274 VIXL_ASSERT(IsValidVRegister());
280 VIXL_ASSERT(IsValidVRegister());
286 VIXL_ASSERT(IsValidVRegister());
305 VIXL_ASSERT(shift != MSL);
306 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize));
307 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize));
308 VIXL_ASSERT(!reg.IsSP());
317 VIXL_ASSERT(reg.IsValid());
318 VIXL_ASSERT(shift_amount <= 4);
319 VIXL_ASSERT(!reg.IsSP());
322 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
360 VIXL_ASSERT(IsShiftedRegister());
361 VIXL_ASSERT((shift_ == LSL) && (shift_amount_ <= 4));
384 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
399 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
400 VIXL_ASSERT(!regoffset.IsSP());
401 VIXL_ASSERT((extend == UXTW) || (extend == SXTW) || (extend == SXTX));
404 VIXL_ASSERT(regoffset.Is64Bits() || (extend != SXTX));
419 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
420 VIXL_ASSERT(regoffset.Is64Bits() && !regoffset.IsSP());
421 VIXL_ASSERT(shift == LSL);
432 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
437 VIXL_ASSERT((addrmode == Offset) || (addrmode == PostIndex));
447 VIXL_ASSERT(regoffset_.Is64Bits() && !regoffset_.IsSP());
448 VIXL_ASSERT(shift_ == LSL);
450 VIXL_ASSERT(offset.IsExtendedRegister());
451 VIXL_ASSERT(addrmode == Offset);
461 VIXL_ASSERT(!regoffset_.IsSP());
462 VIXL_ASSERT((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX));
463 VIXL_ASSERT((regoffset_.Is64Bits() || (extend_ != SXTX)));
485 VIXL_ASSERT(IsImmediateOffset());
493 VIXL_ASSERT(reg.GetSizeInBits() > static_cast<int>(kXRegSize));
