Lines Matching refs:Op
1302 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask));
1303 switch (op) {
1385 if ((op == LDR_s) || (op == LDR_d)) {
1387 } else if ((op == LDR_b) || (op == LDR_h) || (op == LDR_q)) {
1393 if ((op == STR_s) || (op == STR_d)) {
1395 } else if ((op == STR_b) || (op == STR_h) || (op == STR_q)) {
1401 VIXL_ASSERT(op == PRFM);
1437 LoadStorePairOp op =
1441 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || (rt != rt2));
1443 switch (op) {
1508 if ((op == LDP_s) || (op == LDP_d)) {
1511 } else if (op == LDP_q) {
1519 if ((op == STP_s) || (op == STP_d)) {
1522 } else if (op == STP_q) {
1557 LoadStoreExclusive op =
1593 switch (op) {
1663 switch (op) {
2854 void Simulator::SysOp_W(int op, int64_t val) {
2855 switch (op) {
2874 // Some system instructions hijack their Op and Cp fields to represent a
3747 ByElementOp Op = NULL;
3758 Op = &Simulator::mul;
3762 Op = &Simulator::mla;
3766 Op = &Simulator::mls;
3770 Op = &Simulator::sqdmulh;
3774 Op = &Simulator::sqrdmulh;
3779 Op = &Simulator::smull2;
3781 Op = &Simulator::smull;
3786 Op = &Simulator::umull2;
3788 Op = &Simulator::umull;
3793 Op = &Simulator::smlal2;
3795 Op = &Simulator::smlal;
3800 Op = &Simulator::umlal2;
3802 Op = &Simulator::umlal;
3807 Op = &Simulator::smlsl2;
3809 Op = &Simulator::smlsl;
3814 Op = &Simulator::umlsl2;
3816 Op = &Simulator::umlsl;
3821 Op = &Simulator::sqdmull2;
3823 Op = &Simulator::sqdmull;
3828 Op = &Simulator::sqdmlal2;
3830 Op = &Simulator::sqdmlal;
3835 Op = &Simulator::sqdmlsl2;
3837 Op = &Simulator::sqdmlsl;
3850 Op = &Simulator::fmul;
3853 Op = &Simulator::fmla;
3856 Op = &Simulator::fmls;
3859 Op = &Simulator::fmulx;
3866 (this->*Op)(vf, rd, rn, ReadVRegister(rm_reg), index);
4395 NEONModifiedImmediateOp op;
4398 op = op_bit ? NEONModifiedImmediate_MVNI : NEONModifiedImmediate_MOVI;
4400 op = op_bit ? NEONModifiedImmediate_BIC : NEONModifiedImmediate_ORR;
4405 op = op_bit ? NEONModifiedImmediate_MVNI : NEONModifiedImmediate_MOVI;
4407 op = op_bit ? NEONModifiedImmediate_BIC : NEONModifiedImmediate_ORR;
4411 op = op_bit ? NEONModifiedImmediate_MVNI : NEONModifiedImmediate_MOVI;
4414 op = NEONModifiedImmediate_MOVI;
4416 op = NEONModifiedImmediate_MOVI;
4423 if (op == NEONModifiedImmediate_ORR) {
4425 } else if (op == NEONModifiedImmediate_BIC) {
4427 } else if (op == NEONModifiedImmediate_MOVI) {
4429 } else if (op == NEONModifiedImmediate_MVNI) {
4723 ByElementOp Op = NULL;
4734 Op = &Simulator::sqdmull;
4737 Op = &Simulator::sqdmlal;
4740 Op = &Simulator::sqdmlsl;
4743 Op = &Simulator::sqdmulh;
4747 Op = &Simulator::sqrdmulh;
4758 Op = &Simulator::fmul;
4761 Op = &Simulator::fmla;
4764 Op = &Simulator::fmls;
4767 Op = &Simulator::fmulx;
4774 (this->*Op)(vf, rd, rn, ReadVRegister(rm_reg), index);
