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Lines Matching refs:V5

8150 /* ARM V5 breakpoint instruction (argument parse)
8210 /* ARM V5 branch-link-exchange instruction (argument parse)
10678 /* ARM V5 Thumb BLX (argument parse)
17709 /* bx is allowed on v5 cores, and sometimes on v4 cores. */
17738 /* Arm mode bx is marked as both v4T and v5 because it's still required
17739 on a hypothetical non-thumb v5 core. */
17914 REGDEF(v5,8,RN), REGDEF(v6,9,RN), REGDEF(v7,10,RN), REGDEF(v8,11,RN),
17918 REGDEF(V5,8,RN), REGDEF(V6,9,RN), REGDEF(V7,10,RN), REGDEF(V8,11,RN),
18569 /* Note: bx (and blx) are required on V5, even if the processor does
24357 /* For V5 or later processors we default to using VFP; but the user