Lines Matching refs:MODE
343 op_type mode;
376 parse_reg (char *src, op_type *mode, unsigned int *reg, int direction)
391 *mode = PSIZE | REG | direction;
400 *mode = CCR;
409 *mode = EXR;
418 *mode = VBR;
427 *mode = SBR;
433 *mode = PSIZE | REG | direction;
440 *mode = L_32 | REG | direction;
448 *mode = L_16 | REG | direction;
461 *mode = L_8 | REG | direction;
467 *mode = L_8 | REG | direction;
473 *mode = L_16 | REG | direction;
486 in OP->MODE, otherwise leave it for later code to decide. */
501 return skip_colonthing (src, &op->mode);
506 in *MODE. Leave *MODE unchanged otherwise. */
509 skip_colonthing (char *src, int *mode)
514 *mode &= ~SIZE;
516 *mode |= L_8;
518 *mode |= L_2;
520 *mode |= L_3;
522 *mode |= L_4;
524 *mode |= L_5;
526 *mode |= L_24;
528 *mode |= L_32;
530 *mode |= L_16;
606 op_type mode;
610 op->mode = 0;
644 op->mode = REG;
652 len = parse_reg (src, &op->mode, &op->reg, direction);
658 int size = op->mode & SIZE;
664 op->mode = (op->mode & ~MODE) | LOWREG;
669 op->mode = (op->mode & ~MODE) | LOWREG;
670 op->mode = (op->mode & ~SIZE) | L_16;
673 op->mode = (op->mode & ~MODE) | LOWREG;
676 op->mode = (op->mode & ~MODE) | LOWREG;
677 op->mode = (op->mode & ~SIZE) | L_8;
699 op->mode = VECIND;
711 op->mode = MEMIND;
717 len = parse_reg (src + 1, &mode, &num, direction);
721 op->mode = ABS | direction;
726 if (((mode & SIZE) != PSIZE)
727 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
728 && (!Nmode || ((mode & SIZE) != L_32)))
731 op->mode = src[0] == '-' ? RDPREDEC : RDPREINC;
741 len = parse_reg (src, &mode, &op->reg, direction);
742 if (len != 0 && (mode & MODE) == REG && src[len] == '.')
747 mode = PCIDXB | direction;
750 mode = PCIDXW | direction;
753 mode = PCIDXL | direction;
756 mode = 0;
759 if (mode
766 op->mode |= mode;
781 op->mode |= ABS | direction;
793 len = parse_reg (src, &mode, &op->reg, direction);
794 if (len == 0 || (mode & MODE) != REG)
805 op->mode |= INDEXB | direction;
808 op->mode |= INDEXW | direction;
811 op->mode |= INDEXL | direction;
814 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
820 op->mode |= DISP | direction;
821 src = skip_colonthing (src, &op->mode);
831 len = parse_reg (src, &mode, &num, direction);
838 if (((mode & SIZE) != PSIZE)
839 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
840 && (!Nmode || ((mode & SIZE) != L_32)))
842 op->mode = *src == '+' ? RSPOSTINC : RSPOSTDEC;
848 if (((mode & SIZE) != PSIZE)
849 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
850 && (!Nmode || ((mode & SIZE) != L_32)))
853 op->mode = direction | IND | PSIZE;
863 op->mode = ABS | direction;
871 op->mode = IMM;
881 op->mode = MACREG;
887 op->mode = PCREL;
948 operand[0].mode = 0;
962 operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
965 operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
968 operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
974 else if ((operand[1].mode & MODE) == LOWREG)
976 switch (operand[1].mode & SIZE)
979 operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
982 operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
985 operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
998 if (((operand[1].mode & MODE) == REG || (operand[1].mode & MODE) == LOWREG)
999 && (operand[2].mode & MODE) == REG
1002 operand[1].mode = operand[2].mode = 0;
1008 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
1014 int mode, len, type = 0;
1023 len = parse_reg (ptr, &mode, &num, SRC);
1024 if (len == 0 || (mode & MODE) != REG)
1032 len = parse_reg (++ptr, &mode, &num2, SRC);
1033 if (len == 0 || (mode & MODE) != REG)
1054 operand[0].mode = RS32;
1055 operand[1].mode = RD32;
1080 while (noperands < 3 && operands[noperands].mode != 0)
1100 int op_mode = op & MODE;
1102 int x = operands[i].mode;
1103 int x_mode = x & MODE;
1176 operands[i].mode &= ~MODE;
1177 operands[i].mode |= ABSJMP;
1181 operands[i].mode &= ~SIZE;
1182 operands[i].mode |= L_16;
1184 if ((operands[i].mode & SIZE) == L_32
1267 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1337 char *t = ((operand->mode & MODE) == IMM) ? "#" : "@";
1341 switch (operand->mode & SIZE)
1398 if ((operand->mode & MODE) == DISP && relaxmode == 1)
1410 switch (operand->mode & SIZE)
1415 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
1417 if ((operand->mode & MODE) == DISP && relaxmode == 1)
1478 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1483 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1489 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1505 int c2 = c & MODE;
1525 operand[d].mode = c;
1532 operand[d].mode = c;
1574 operand[0].mode = 0;
1578 operand[d].mode |= MEMRELAX;
1594 if (operand[0].mode == MACREG)
1649 int x = operand[i].mode;
1650 int x_mode = x & MODE;
1656 addressing mode "register indirect with displacement". */
1746 if ((operand->mode & SIZE) == L_32)
1798 if (operand[argn].mode != RD16)
1807 if (operand[argn].mode != RS8)
1815 if (operand[argn].mode != ABS16DST)
1822 if (operand[argn].mode != RD8)
1830 if (operand[argn].mode != ABS16SRC)
1854 if (SXmode && (operand->mode & MODE) == DISP)
1858 if ((operand->mode & SIZE) == 0
1864 operand->mode |= L_2;
1868 if ((operand->mode & SIZE) == L_2)
1876 if ((operand->mode & SIZE) == 0)
1877 switch (operand->mode & MODE)
1893 operand->mode |= L_24;
1895 operand->mode |= L_16;
1903 operand->mode |= bsize;
1905 operand->mode |= L_8;
1908 operand->mode |= L_16;
1978 operand[0].mode = 0;
1979 operand[1].mode = 0;
1980 operand[2].mode
2001 if ((operand[0].mode != RSINC)
2011 || (operand[1].mode != RDDEC)
2038 switch (operand[0].mode & MODE)
2054 for (i = 0; i < 3 && operand[i].mode != 0; i++)
