Lines Matching refs:VR1
1278 #define VR1 (VECTOR5 + 1)1281 #define VR2 (VR1 + 1)1772 { "sttc.vr", two (0x07e0, 0x0852), two (0x07e0, 0xffff), {VR1, R2}, 0, PROCESSOR_V850E3V5_UP },
