1 #ifndef ARCH_X86_64_h 2 #define ARCH_X86_64_h 3 4 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx, 5 unsigned int *ecx, unsigned int *edx) 6 { 7 asm volatile("cpuid" 8 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) 9 : "0" (*eax), "2" (*ecx) 10 : "memory"); 11 } 12 13 #include "arch-x86-common.h" 14 15 #define FIO_ARCH (arch_x86_64) 16 17 #ifndef __NR_ioprio_set 18 #define __NR_ioprio_set 251 19 #define __NR_ioprio_get 252 20 #endif 21 22 #ifndef __NR_fadvise64 23 #define __NR_fadvise64 221 24 #endif 25 26 #ifndef __NR_sys_splice 27 #define __NR_sys_splice 275 28 #define __NR_sys_tee 276 29 #define __NR_sys_vmsplice 278 30 #endif 31 32 #ifndef __NR_shmget 33 #define __NR_shmget 29 34 #define __NR_shmat 30 35 #define __NR_shmctl 31 36 #define __NR_shmdt 67 37 #endif 38 39 #define FIO_HUGE_PAGE 2097152 40 41 #define nop __asm__ __volatile__("rep;nop": : :"memory") 42 #define read_barrier() __asm__ __volatile__("lfence":::"memory") 43 #define write_barrier() __asm__ __volatile__("sfence":::"memory") 44 45 static inline unsigned long arch_ffz(unsigned long bitmask) 46 { 47 __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask)); 48 return bitmask; 49 } 50 51 static inline unsigned long long get_cpu_clock(void) 52 { 53 unsigned int lo, hi; 54 55 __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi)); 56 return ((unsigned long long) hi << 32ULL) | lo; 57 } 58 59 #define ARCH_HAVE_FFZ 60 #define ARCH_HAVE_SSE4_2 61 #define ARCH_HAVE_CPU_CLOCK 62 63 #endif 64
