/device/linaro/bootloader/edk2/Nt32Pkg/CpuRuntimeDxe/ |
CpuDriver.h | 57 EFI_CPU_IO2_PROTOCOL CpuIo;
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/device/linaro/bootloader/edk2/OvmfPkg/BlockMmioToBlockIoDxe/ |
BlockIo.h | 44 EFI_CPU_IO2_PROTOCOL *CpuIo;
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/device/linaro/bootloader/edk2/MdeModulePkg/Core/Pei/PeiMain/ |
PeiMain.c | 152 EFI_PEI_CPU_IO_PPI *CpuIo;
183 OldCoreData->CpuIo = &OldCoreData->ServiceTableShadow.CpuIo;
288 CpuIo = (VOID*)PrivateData.ServiceTableShadow.CpuIo;
293 PrivateData.ServiceTableShadow.CpuIo = CpuIo;
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/device/linaro/bootloader/edk2/MdePkg/Library/PeiIoLibCpuIo/ |
IoLib.c | 2 I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo interface.
44 EFI_PEI_CPU_IO_PPI *CpuIo;
47 CpuIo = (*PeiServices)->CpuIo;
48 ASSERT (CpuIo != NULL);
50 return CpuIo->IoRead8 (PeiServices, CpuIo, (UINT64) Port);
76 EFI_PEI_CPU_IO_PPI *CpuIo;
79 CpuIo = (*PeiServices)->CpuIo;
[all...] |
/device/linaro/bootloader/edk2/EmulatorPkg/CpuRuntimeDxe/ |
CpuDriver.h | 53 EFI_CPU_IO2_PROTOCOL CpuIo;
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/device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Framework/ |
PeiCis.h | 182 /// In Framework Spec, PeiCis0.91, CpuIo and PciCfg are NOT pointers.
188 EFI_PEI_CPU_IO_PPI *CpuIo;
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/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/ |
PciHostBridge.h | 44 #define PCIE_ROOTPORT_WRITE32(Add, Val) { UINT32 Value = (UINT32)(Val); CpuIo->Mem.Write (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieRootPortBaseAddress)+(Add)),1,&Value); }
45 #define PCIE_ROOTPORT_READ32(Add, Val) { CpuIo->Mem.Read (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieRootPortBaseAddress)+(Add)),1,&Val); }
47 #define PCIE_CONTROL_WRITE32(Add, Val) { UINT32 Value = (UINT32)(Val); CpuIo->Mem.Write (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieControlBaseAddress)+(Add)),1,&Value); }
48 #define PCIE_CONTROL_READ32(Add, Val) { CpuIo->Mem.Read (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieControlBaseAddress)+(Add)),1,&Val); }
113 EFI_CPU_IO2_PROTOCOL *CpuIo;
321 IN EFI_CPU_IO2_PROTOCOL *CpuIo
[all...] |
PciRootBridge.c | 21 #define CPUIO_FROM_ROOT_BRIDGE_INSTANCE(Instance) (Instance->HostBridge->CpuIo)
233 EFI_CPU_IO2_PROTOCOL *CpuIo;
238 CpuIo = CPUIO_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
253 return CpuIo->Mem.Read (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH)Width, Address, Count, Buffer);
266 EFI_CPU_IO2_PROTOCOL *CpuIo;
271 CpuIo = CPUIO_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
286 return CpuIo->Mem.Write (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH)Width, Address, Count, Buffer);
346 EFI_CPU_IO2_PROTOCOL *CpuIo;
[all...] |
/device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/ |
PcatPciRootBridge.h | 57 EFI_CPU_IO2_PROTOCOL *CpuIo;
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/device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/ |
Mm.c | 124 @param[in] CpuIo CpuIo instance.
134 IN EFI_CPU_IO2_PROTOCOL *CpuIo,
184 if (CpuIo != NULL) {
185 CpuIoMem = Read ? CpuIo->Mem.Read : CpuIo->Mem.Write;
193 if (CpuIo != NULL) {
194 CpuIoMem = Read ? CpuIo->Io.Read : CpuIo->Io.Write;
207 Status = CpuIoMem (CpuIo, mShellMmCpuIoWidth[Size], Address, 1, Buffer); [all...] |
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/VlvPlatformInitDxe/ |
IgdOpRegion.c | 63 #include <Protocol/CpuIo.h>
657 EFI_CPU_IO_PROTOCOL *CpuIo;
907 (void **)&CpuIo
911 CpuIo->Io.Read (
912 CpuIo,
923 CpuIo->Io.Write (
924 CpuIo,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Include/ |
PeiApi.h | 43 #include EFI_PPI_DEFINITION (CpuIo)
549 PEI_CPU_IO_PPI *CpuIo;
556 EFI_PEI_CPU_IO_PPI *CpuIo;
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/device/linaro/bootloader/edk2/MdeModulePkg/Core/Pei/ |
PeiMain.h | 224 VOID *CpuIo;
[all...] |
/device/linaro/bootloader/edk2/MdePkg/Include/Pi/ |
PiPeiCis.h | 46 #include <Ppi/CpuIo.h>
[all...] |
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/ |
Platform.c | 1065 EFI_CPU_IO_PROTOCOL *CpuIo;
1136 (VOID **)&CpuIo
1145 Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST);
[all...] |