/external/skia/tools/ |
ok.h | 35 struct Dst { 36 virtual ~Dst() {} 49 // Create globals to register your new type of Stream or Dst. 52 Register(const char* name, std::unique_ptr<Dst> (*factory)(Options)); 53 Register(const char* name, std::unique_ptr<Dst> (*factory)(Options, std::unique_ptr<Dst>));
|
/external/llvm/include/llvm/Target/ |
CostTable.h | 46 MVT::SimpleValueType Dst; 55 int ISD, MVT Dst, MVT Src) { 59 Dst == Entry.Dst;
|
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_variable.h | 46 struct rc_dst_register Dst;
|
/external/swiftshader/src/Shader/ |
PixelRoutine.hpp | 43 typedef Shader::DestinationParameter Dst;
|
VertexProgram.hpp | 60 typedef Shader::DestinationParameter Dst; 76 void M3X2(Vector4f &dst, Vector4f &src0, Src &src1); 77 void M3X3(Vector4f &dst, Vector4f &src0, Src &src1); 78 void M3X4(Vector4f &dst, Vector4f &src0, Src &src1); 79 void M4X3(Vector4f &dst, Vector4f &src0, Src &src1); 80 void M4X4(Vector4f &dst, Vector4f &src0, Src &src1); 109 void TEXLDL(Vector4f &dst, Vector4f &src, const Src&); 110 void TEX(Vector4f &dst, Vector4f &src, const Src&); 111 void TEXOFFSET(Vector4f &dst, Vector4f &src, const Src&, Vector4f &src2, Vector4f &src3); 112 void TEXLDL(Vector4f &dst, Vector4f &src, const Src&, Vector4f &src2) [all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Universal/Network/Ip4Dxe/ |
Ip4Icmp.c | 109 IP4_ADDR Dst;
138 Dst = NTOHL (Icmp->IpHead.Dst);
140 CacheEntry = Ip4FindRouteCache (Ip4Instance->RouteTable, Dst, Src);
257 ReplyHead.Dst = Head->Src;
|
Ip4Input.h | 56 // the same (Dst, Src, Id, Protocol).
58 IP4_ADDR Dst;
83 #define IP4_ASSEMBLE_HASH(Dst, Src, Id, Proto) \
84 (((Dst) + (Src) + ((Id) << 16) + (Proto)) % IP4_ASSEMLE_HASH_SIZE)
|
/external/libchrome/base/numerics/ |
safe_conversions.h | 20 template <typename Dst, typename Src> 22 return internal::DstRangeRelationToSrcRange<Dst>(value) == 47 template <typename Dst, typename Src> 48 inline Dst checked_cast(Src value) { 49 CHECK(IsValueInRangeForNumericType<Dst>(value)); 50 return static_cast<Dst>(value); 73 template <typename Dst, class NaNHandler, typename Src> 74 constexpr Dst saturated_cast_impl(const Src value, 77 ? static_cast<Dst>(value) 79 ? std::numeric_limits<Dst>::min( [all...] |
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
AMDGPUAsmBackend.cpp | 105 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset()); 106 *Dst = BrImm;
|
/external/llvm/lib/Target/Lanai/ |
LanaiFrameLowering.cpp | 76 unsigned Dst = MI.getOperand(0).getReg(); 79 BuildMI(*MBB, MI, DL, LII.get(Lanai::ADD_I_LO), Dst)
|
/external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/ |
AsmPrinterDwarf.cpp | 213 const MachineLocation &Dst = Move.getDestination(); 217 if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) { 226 assert(Dst.isReg() && "Machine move not supported yet."); 227 OutStreamer.EmitCFIDefCfaRegister(RI->getDwarfRegNum(Dst.getReg(), true)); 229 assert(!Dst.isReg() && "Machine move not supported yet."); 231 Dst.getOffset());
|
/frameworks/av/media/libmedia/include/media/ |
convert.h | 193 typedef std::vector<DstElem> Dst; 195 static inline bool run(Src &src, Dst &dst) 198 dst.clear(); 199 dst.reserve(src.size()); 205 dst.push_back(dstElem);
|
/external/llvm/lib/Target/AMDGPU/ |
SILowerI1Copies.cpp | 95 const MachineOperand &Dst = MI.getOperand(0); 99 !TargetRegisterInfo::isVirtualRegister(Dst.getReg())) 102 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst.getReg()); 107 I1Defs.push_back(Dst.getReg()); 113 I1Defs.push_back(Dst.getReg()); 119 .addOperand(Dst) 127 .addOperand(Dst) 135 .addOperand(Dst)
|
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | 80 const MCOperand &Dst = MI->getOperand(0); 90 printRegName(O, Dst.getReg()); 103 const MCOperand &Dst = MI->getOperand(0); 112 printRegName(O, Dst.getReg()); [all...] |
/external/pdfium/third_party/base/numerics/ |
safe_conversions.h | 53 template <typename Dst, typename Src> 55 return internal::DstRangeRelationToSrcRange<Dst>(value).IsValid(); 74 template <typename Dst, class CheckHandler = CheckOnFailure, typename Src> 75 constexpr Dst checked_cast(Src value) { 79 return IsValueInRangeForNumericType<Dst, SrcType>(value) 80 ? static_cast<Dst>(static_cast<SrcType>(value)) 81 : CheckHandler::template HandleFailure<Dst>(); 108 template <typename Dst, template <typename> class S, typename Src> 109 constexpr Dst saturated_cast_impl(Src value, RangeCheck constraint) { 113 ? (!constraint.IsUnderflowFlagSet() ? static_cast<Dst>(value [all...] |
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseUefiDecompressLib/ |
BaseUefiDecompressLib.c | 779 UINT8 *Dst;
786 Dst = Destination;
812 Sd->mDstBase = Dst;
|
/device/linaro/bootloader/edk2/MdePkg/Library/BaseUefiDecompressLib/ |
BaseUefiDecompressLib.c | 748 UINT8 *Dst;
755 Dst = Destination;
778 Sd->mDstBase = Dst;
|
/device/linaro/bootloader/edk2/NetworkPkg/Ip6Dxe/ |
Ip6Input.h | 37 #define IP6_ASSEMBLE_HASH(Dst, Src, Id) \
38 ((*((UINT32 *) (Dst)) + *((UINT32 *) (Src)) + (Id)) % IP6_ASSEMLE_HASH_SIZE)
77 // the same (Dst, Src, Id).
79 EFI_IPv6_ADDRESS Dst;
|
/external/llvm/lib/IR/ |
GCOV.cpp | 181 uint32_t Dst; 182 if (!Buff.readInt(Dst)) 184 Edges.push_back(make_unique<GCOVEdge>(*Blocks[BlockNo], *Blocks[Dst])); 187 Blocks[Dst]->addSrcEdge(Edge); 384 if (!DstEdges[DstEdgeNo]->Dst.getNumDstEdges()) 385 DstEdges[DstEdgeNo]->Dst.Counter += N; 416 dbgs() << Edge->Dst.Number << " (" << Edge->Count << "), ";
|
/external/llvm/lib/Support/ |
ConvertUTFWrapper.cpp | 118 UTF8 *Dst = reinterpret_cast<UTF8 *>(&Out[0]); 119 UTF8 *DstEnd = Dst + Out.size(); 122 ConvertUTF16toUTF8(&Src, SrcEnd, &Dst, DstEnd, strictConversion); 130 Out.resize(reinterpret_cast<char *>(Dst) - &Out[0]); 163 UTF16 *Dst = &DstUTF16[0]; 164 UTF16 *DstEnd = Dst + DstUTF16.size(); 167 ConvertUTF8toUTF16(&Src, SrcEnd, &Dst, DstEnd, strictConversion); 175 DstUTF16.resize(Dst - &DstUTF16[0]);
|
/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 105 void ChangeOpInto(MachineOperand &Dst, MachineOperand &Src); 140 MachineOperand &Dst = MI.getOperand(0); 142 unsigned DstReg = Dst.getReg(); 158 MachineOperand &Dst = MI.getOperand(0); 163 unsigned DstReg = Dst.getReg(); 175 MachineOperand &Dst = MI.getOperand(0); 180 unsigned DstReg = Dst.getReg(); 189 MachineOperand &Dst = MI.getOperand(0); 191 unsigned DstReg = Dst.getReg(); 207 MachineOperand &Dst = MI.getOperand(0) [all...] |
RDFCopy.cpp | 33 const MachineOperand &Dst = MI->getOperand(0); 35 RegisterRef DstR = { Dst.getReg(), Dst.getSubReg() }; 58 const MachineOperand &Dst = MI->getOperand(0); 59 RegisterRef DefR = { Dst.getReg(), Dst.getSubReg() };
|
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/ |
BaseUefiTianoCustomDecompressLib.c | 744 UINT8 *Dst;
751 Dst = Destination;
785 Sd->mDstBase = Dst;
|
/external/clang/lib/StaticAnalyzer/Core/ |
CoreEngine.cpp | 287 ExplodedNodeSet &Dst) { 291 Dst.Add(*I); 480 ExplodedNodeSet Dst; 481 SubEng.processBranch(Cond, Term, Ctx, Pred, Dst, 484 enqueue(Dst); 492 ExplodedNodeSet Dst; 493 SubEng.processCleanupTemporaryBranch(BTE, Ctx, Pred, Dst, *(B->succ_begin()), 496 enqueue(Dst); 503 ExplodedNodeSet Dst; 504 SubEng.processStaticInitializer(DS, Ctx, Pred, Dst, [all...] |
/external/llvm/include/llvm/ExecutionEngine/Orc/ |
OrcRemoteTargetRPCAPI.h | 30 DirectBufferWriter(const char *Src, TargetAddress Dst, uint64_t Size) 31 : Src(Src), Dst(Dst), Size(Size) {} 34 TargetAddress getDst() const { return Dst; } 39 TargetAddress Dst; 52 TargetAddress Dst; 53 if (auto EC = deserialize(C, Dst)) 58 char *Addr = reinterpret_cast<char *>(static_cast<uintptr_t>(Dst)); 60 DBW = DirectBufferWriter(0, Dst, Size); 190 void(ResourceIdMgr::ResourceId AllocID, TargetAddress Dst, [all...] |