| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| DemoteRegToStack.cpp | 60 // node that we cannot multiple loads. The problem is that the resultant
63 // and reuse loads we insert.
64 std::map<BasicBlock*, Value*> Loads;
67 Value *&V = Loads[PN->getIncomingBlock(i)];
|
| /external/llvm/lib/Transforms/Utils/ |
| DemoteRegToStack.cpp | 64 // node that we cannot have multiple loads. The problem is that the
67 // keep track of and reuse loads we insert.
68 DenseMap<BasicBlock*, Value*> Loads;
71 Value *&V = Loads[PN->getIncomingBlock(i)];
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| PTXSelectionDAGInfo.cpp | 36 // Do repeated 4-byte loads and stores. To be improved.
59 SDValue Loads[MAX_LOADS_IN_LDM];
63 // Emit up to MAX_LOADS_IN_LDM loads, then a TokenFactor barrier, then the
64 // same number of stores. The loads and stores will get combined into
69 Loads[i] = DAG.getLoad(VT, dl, Chain,
74 TFOps[i] = Loads[i].getValue(1);
81 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
96 // Issue loads / stores for the trailing (1 - 3) bytes.
108 Loads[i] = DAG.getLoad(VT, dl, Chain,
112 TFOps[i] = Loads[i].getValue(1)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMSelectionDAGInfo.cpp | 36 // Do repeated 4-byte loads and stores. To be improved.
57 SDValue Loads[MAX_LOADS_IN_LDM];
60 // Emit up to MAX_LOADS_IN_LDM loads, then a TokenFactor barrier, then the
61 // same number of stores. The loads and stores will get combined into
66 Loads[i] = DAG.getLoad(VT, dl, Chain,
71 TFOps[i] = Loads[i].getValue(1);
78 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
93 // Issue loads / stores for the trailing (1 - 3) bytes.
105 Loads[i] = DAG.getLoad(VT, dl, Chain,
109 TFOps[i] = Loads[i].getValue(1)
[all...] |
| /external/llvm/lib/Analysis/ |
| AliasAnalysisEvaluator.cpp | 103 SetVector<Value *> Loads;
114 Loads.insert(&*I);
178 for (Value *Load : Loads) {
|
| LoopAccessAnalysis.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 38 STATISTIC(LoadsClustered, "Number of loads clustered together");
197 /// ClusterNeighboringLoads - Force nearby loads together by "gluing" them.
198 /// This function finds loads of the same base and different offsets. If the
210 // Look for other loads of the same chain. Find loads that are loading from
229 // optimizations really should have eliminated one of the loads.
248 // Check if the loads are close enough.
249 SmallVector<SDNode*, 4> Loads;
253 Loads.push_back(BaseLoad);
258 break; // Stop right here. Ignore loads that are further away
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| DAGCombiner.cpp | 83 cl::desc("DAG combiner may split indexing from loads"));
454 /// Loads that may alias with those stores are placed in AliasLoadNodes.
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.cpp | 134 // Do repeated 4-byte loads and stores. To be improved.
155 // Emit a maximum of 4 loads in Thumb1 since we have fewer registers
158 SDValue Loads[6];
200 // Issue loads / stores for the trailing (1 - 3) bytes.
212 Loads[i] = DAG.getLoad(VT, dl, Chain,
217 TFOps[i] = Loads[i].getValue(1);
236 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/IPO/ |
| ArgumentPromotion.cpp | 318 // We can only promote this argument if all of the uses are loads, or are GEP
326 // In the former case, invalid loads can happen, but would have happened
327 // anyway, in the latter case, invalid loads won't happen. This prevents us
343 // First, iterate the entry block and mark loads of (geps of) arguments as
355 // This load actually loads (part of) Arg? Check the indices then.
371 // Direct loads are equivalent to a GEP with a single 0 index.
377 // not (GEP+)loads, or any (GEP+)loads that are not safe to promote.
378 SmallVector<LoadInst*, 16> Loads;
385 // Don't hack volatile/atomic loads
[all...] |
| /external/llvm/lib/Transforms/IPO/ |
| ArgumentPromotion.cpp | 41 #include "llvm/Analysis/Loads.h"
466 // We can only promote this argument if all of the uses are loads, or are GEP
474 // In the former case, invalid loads can happen, but would have happened
475 // anyway, in the latter case, invalid loads won't happen. This prevents us
494 // First, iterate the entry block and mark loads of (geps of) arguments as
505 // This load actually loads (part of) Arg? Check the indices then.
521 // Direct loads are equivalent to a GEP with a single 0 index.
527 // not (GEP+)loads, or any (GEP+)loads that are not safe to promote.
528 SmallVector<LoadInst*, 16> Loads;
[all...] |
| GlobalOpt.cpp | 329 // Loads are ok.
621 /// Return true if all uses of any loads from GV will trap if the loaded value
716 // Replace all uses of loads with uses of uses of the stored value.
721 // If we were able to delete all uses of the loads
746 DEBUG(dbgs() << "OPTIMIZED LOADS FROM STORED ONCE POINTER: " << *GV << "\n");
750 // If we nuked all of the loads, then none of the stores are needed either,
790 /// loads of GV as uses of the new global.
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 36 STATISTIC(LoadsClustered, "Number of loads clustered together");
166 /// ClusterNeighboringLoads - Force nearby loads together by "gluing" them.
167 /// This function finds loads of the same base and different offsets. If the
179 // Look for other loads of the same chain. Find loads that are loading from
195 // optimizations really should have eliminated one of the loads.
212 // Check if the loads are close enough.
213 SmallVector<SDNode*, 4> Loads;
217 Loads.push_back(BaseLoad);
222 break; // Stop right here. Ignore loads that are further away
[all...] |
| /external/llvm/lib/CodeGen/ |
| WinEHPrepare.cpp | 76 DenseMap<BasicBlock *, Value *> &Loads, Function &F);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | 45 // Legalize loads and stores to the private address space.
66 // Workaround for LegalizeDAG asserting on expansion of i1 vector loads.
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 731 // Walk the register/memloc assignments, inserting copies/loads.
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
