| /art/disassembler/ |
| disassembler_x86.h | 25 enum RegFile { GPR, MMX, SSE };
|
| /external/fec/ |
| encode_rs_8.c | 12 static enum {UNKNOWN=0,MMX,SSE,SSE2,ALTIVEC,PORT} cpu_mode;
32 } else if(f & (1<<23)){ /* MMX is present */
33 cpu_mode = MMX;
58 case MMX:
|
| fec.h | 261 extern enum cpu_mode {UNKNOWN=0,PORT,MMX,SSE,SSE2,ALTIVEC} Cpu_mode;
|
| /external/swiftshader/src/Common/ |
| CPUID.cpp | 32 bool CPUID::MMX = detectMMX();
178 return MMX = (registers[3] & 0x00800000) != 0;
|
| CPUID.hpp | 29 static bool supportsMMX2(); // MMX instructions added by SSE: pshufw, pmulhuw, pmovmskb, pavgw/b, pextrw, pinsrw, pmaxsw/ub, etc.
50 static bool MMX;
84 return MMX && enableMMX;
|
| /external/llvm/include/llvm/IR/ |
| Intrinsics.h | 91 Void, VarArg, MMX, Token, Metadata, Half, Float, Double,
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/ |
| PlatformCpuInfo.h | 139 UINT8 MMX; // EDX [23]
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86Subtarget.h | 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
172 bool hasMMX() const { return X86SSELevel >= MMX; }
|
| /external/llvm/lib/Target/X86/ |
| X86Subtarget.h | 53 NoThreeDNow, MMX, ThreeDNow, ThreeDNowA
71 /// MMX, 3DNow, 3DNow Athlon, or none supported.
394 bool hasMMX() const { return X863DNowLevel >= MMX; }
|
| /external/clang/lib/CodeGen/ |
| CGBuiltin.cpp | [all...] |
| /external/swiftshader/src/Reactor/ |
| Nucleus.hpp | 382 class MMX : public Variable<MMX>
[all...] |
