1 #ifndef COMMON_CMDBUF_H 2 #define COMMON_CMDBUF_H 3 4 GLboolean rcommonEnsureCmdBufSpace(radeonContextPtr rmesa, int dwords, const char *caller); 5 int rcommonFlushCmdBuf(radeonContextPtr rmesa, const char *caller); 6 int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller); 7 void rcommonInitCmdBuf(radeonContextPtr rmesa); 8 void rcommonDestroyCmdBuf(radeonContextPtr rmesa); 9 10 void rcommonBeginBatch(radeonContextPtr rmesa, 11 int n, 12 int dostate, 13 const char *file, 14 const char *function, 15 int line); 16 17 /* +r6/r7 : code here moved */ 18 19 #define CP_PACKET2 (2 << 30) 20 #define CP_PACKET0(reg, n) (RADEON_CP_PACKET0 | ((n)<<16) | ((reg)>>2)) 21 #define CP_PACKET0_ONE(reg, n) (RADEON_CP_PACKET0 | RADEON_CP_PACKET0_ONE_REG_WR | ((n)<<16) | ((reg)>>2)) 22 #define CP_PACKET3(pkt, n) (RADEON_CP_PACKET3 | (pkt) | ((n) << 16)) 23 24 /** 25 * Every function writing to the command buffer needs to declare this 26 * to get the necessary local variables. 27 */ 28 #define BATCH_LOCALS(rmesa) \ 29 const radeonContextPtr b_l_rmesa = rmesa 30 31 /** 32 * Prepare writing n dwords to the command buffer, 33 * including producing any necessary state emits on buffer wraparound. 34 */ 35 #define BEGIN_BATCH(n) rcommonBeginBatch(b_l_rmesa, n, 1, __FILE__, __FUNCTION__, __LINE__) 36 37 /** 38 * Same as BEGIN_BATCH, but do not cause automatic state emits. 39 */ 40 #define BEGIN_BATCH_NO_AUTOSTATE(n) rcommonBeginBatch(b_l_rmesa, n, 0, __FILE__, __FUNCTION__, __LINE__) 41 42 /** 43 * Write one dword to the command buffer. 44 */ 45 #define OUT_BATCH(data) \ 46 do { \ 47 radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, data);\ 48 } while(0) 49 50 /** 51 * Write a relocated dword to the command buffer. 52 */ 53 #define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags) \ 54 do { \ 55 int __offset = (offset); \ 56 if (0 && __offset) { \ 57 fprintf(stderr, "(%s:%s:%d) offset : %d\n", \ 58 __FILE__, __FUNCTION__, __LINE__, __offset); \ 59 } \ 60 radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, __offset); \ 61 radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs, \ 62 bo, rd, wd, flags); \ 63 } while(0) 64 65 66 /** 67 * Write n dwords from ptr to the command buffer. 68 */ 69 #define OUT_BATCH_TABLE(ptr,n) \ 70 do { \ 71 radeon_cs_write_table(b_l_rmesa->cmdbuf.cs, (ptr), (n));\ 72 } while(0) 73 74 /** 75 * Finish writing dwords to the command buffer. 76 * The number of (direct or indirect) OUT_BATCH calls between the previous 77 * BEGIN_BATCH and END_BATCH must match the number specified at BEGIN_BATCH time. 78 */ 79 #define END_BATCH() \ 80 do { \ 81 radeon_cs_end(b_l_rmesa->cmdbuf.cs, __FILE__, __FUNCTION__, __LINE__);\ 82 } while(0) 83 84 /** 85 * After the last END_BATCH() of rendering, this indicates that flushing 86 * the command buffer now is okay. 87 */ 88 #define COMMIT_BATCH() \ 89 do { \ 90 } while(0) 91 92 93 /** Single register write to command buffer; requires 2 dwords. */ 94 #define OUT_BATCH_REGVAL(reg, val) \ 95 OUT_BATCH(cmdpacket0(b_l_rmesa->radeonScreen, (reg), 1)); \ 96 OUT_BATCH((val)) 97 98 /** Continuous register range write to command buffer; requires 1 dword, 99 * expects count dwords afterwards for register contents. */ 100 #define OUT_BATCH_REGSEQ(reg, count) \ 101 OUT_BATCH(cmdpacket0(b_l_rmesa->radeonScreen, (reg), (count))) 102 103 /* +r6/r7 : code here moved */ 104 105 /* Fire the buffered vertices no matter what. 106 */ 107 static INLINE void radeon_firevertices(radeonContextPtr radeon) 108 { 109 if (radeon->cmdbuf.cs->cdw || radeon->dma.flush ) 110 radeon->glCtx->Driver.Flush(radeon->glCtx); /* +r6/r7 */ 111 } 112 113 #endif 114
