| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.h | 62 static const SpillSlot Offsets[] = {
70 NumEntries = array_lengthof(Offsets);
71 return Offsets;
|
| /external/skia/src/sfnt/ |
| SkOTTable_loca.h | 23 union Offsets {
26 } offsets; member in struct:SkOTTableIndexToLocation
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 112 // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
132 static const SpillSlot Offsets[] = {
133 // Floating-point register save area offsets.
153 // General register save area offsets.
210 // Floating-point register save area offsets.
230 // General register save area offsets.
312 NumEntries = array_lengthof(Offsets);
314 return Offsets;
|
| /external/llvm/include/llvm/Transforms/IPO/ |
| LowerTypeTests.h | 71 SmallVector<uint64_t, 16> Offsets;
82 Offsets.push_back(Offset);
152 /// loading from indexed offsets into the byte array and applying a mask, a
|
| /external/llvm/unittests/Transforms/IPO/ |
| LowerTypeTests.cpp | 18 std::vector<uint64_t> Offsets;
56 for (auto Offset : T.Offsets)
68 for (auto Offset : T.Offsets)
71 auto I = T.Offsets.begin();
73 if (I != T.Offsets.end() && *I == NonOffset) {
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 198 /// This function finds loads of the same base and different offsets. If the
199 /// offsets are not far apart (target specific), it add MVT::Glue inputs and
211 // the same base pointer and different offsets.
213 SmallVector<int64_t, 4> Offsets;
232 Offsets.push_back(Offset1);
234 Offsets.push_back(Offset2);
246 std::sort(Offsets.begin(), Offsets.end());
251 int64_t BaseOff = Offsets[0];
254 for (unsigned i = 1, e = Offsets.size(); i != e; ++i)
[all...] |
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 115 int64_t Offsets[3] = {
124 SrcSelect[ELEMENT_W] << 29 | Offsets[0] << 0 | Offsets[1] << 5 |
125 Offsets[2] << 10;
|
| /external/llvm/lib/Object/ |
| Archive.cpp | 495 const char *Offsets = Buf;
497 Offsets += sizeof(uint64_t);
499 Offsets += sizeof(uint32_t);
502 Offset = read32be(Offsets + SymbolIndex * 4);
504 Offset = read64be(Offsets + SymbolIndex * 8);
507 // Offsets (the first uint32_t is the number of bytes of the ranlib
512 Offset = read32le(Offsets + SymbolIndex * 8 + 4);
515 // Offsets (the first uint64_t is the number of bytes of the ranlib_64
520 Offset = read64le(Offsets + SymbolIndex * 16 + 8);
522 // Skip offsets
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 574 /// Offsets in bytes from the start of the input buffer
575 enum Offsets {
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 85 SmallVectorImpl<uint64_t> *Offsets = nullptr,
97 if (Offsets)
98 Offsets->push_back(Off+j*VT.getVectorElementType().getStoreSize());
102 if (Offsets)
103 Offsets->push_back(Off);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 167 /// This function finds loads of the same base and different offsets. If the
168 /// offsets are not far apart (target specific), it add MVT::Glue inputs and
180 // the same base pointer and different offsets.
182 SmallVector<int64_t, 4> Offsets;
198 Offsets.push_back(Offset1);
200 Offsets.push_back(Offset2);
210 std::sort(Offsets.begin(), Offsets.end());
215 int64_t BaseOff = Offsets[0];
218 for (unsigned i = 1, e = Offsets.size(); i != e; ++i)
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 91 // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
111 // Note that the offsets here overlap, but this is fixed up in
114 static const SpillSlot Offsets[] = {
115 // Floating-point register save area offsets.
135 // General register save area offsets.
179 // Floating-point register save area offsets.
199 // General register save area offsets.
241 NumEntries = array_lengthof(Offsets);
243 return Offsets;
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| /external/clang/lib/AST/ |
| VTableBuilder.cpp | 112 /// as a record decl and a subobject number) and its offsets in the most
119 /// ComputeBaseOffsets - Compute the offsets for all base subobjects of the
166 // Compute base offsets.
252 // even change the base offsets in ASTRecordLayout to be specified in
442 /// VCallOffsetMap - Keeps track of vcall offsets when building a vtable.
447 /// Offsets - Keeps track of methods and their offsets.
449 SmallVector<MethodAndOffsetPairTy, 16> Offsets;
467 bool empty() const { return Offsets.empty(); }
512 for (const auto &OffsetPair : Offsets) {
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 707 const SmallVectorImpl<int64_t> &Offsets,
807 const SmallVectorImpl<int64_t> &Offsets,
837 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
838 E = Offsets.end(); I != E; ++I) {
919 /// offsets, for example in an unrolled loop.
[all...] |
| /external/clang/lib/Serialization/ |
| ASTReaderDecl.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 835 /// additional base registers and/or unfolded offsets to derive an
886 const SmallVectorImpl<int64_t> &Offsets,
[all...] |
| /external/pdfium/third_party/lcms2-2.6/src/ |
| cmstypes.c | 164 // A table of n elements is readed, where first comes n records containing offsets and sizes and
177 // Let's take the offsets to each element
233 // Keep starting position of curve offsets
[all...] |
