| /external/clang/test/CodeGen/ |
| mips-byval-arg.c | 6 } S0;
8 extern void foo2(S0);
13 void foo1(S0 a0) {
|
| mips64-padding-arg.c | 8 } S0;
10 // Insert padding to ensure arguments of type S0 are aligned to 16-byte boundaries.
16 extern void foo2(int, int, int, S0, S0, int, S0);
18 void foo1(int a0, S0 a1, S0 a2, int b, S0 a3) {
36 // N64-LABEL: define void @foo5(%struct.S0* noalias sret %agg.result, i64, fp128 %a0)
37 // N64: call void @foo6(%struct.S0* sret %agg.result, i32 signext 1, i32 signext 2, i64 undef, fp128 %a0
[all...] |
| /prebuilts/go/darwin-x86/src/go/doc/testdata/ |
| error1.go | 20 type S0 struct {
|
| error2.go | 20 type S0 struct {
|
| /prebuilts/go/darwin-x86/test/fixedbugs/issue6295.dir/ |
| p0.go | 11 type S0 struct{}
13 func (S0) m0() {}
|
| /prebuilts/go/linux-x86/src/go/doc/testdata/ |
| error1.go | 20 type S0 struct {
|
| error2.go | 20 type S0 struct {
|
| /prebuilts/go/linux-x86/test/fixedbugs/issue6295.dir/ |
| p0.go | 11 type S0 struct{}
13 func (S0) m0() {}
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/ |
| pcr-relocs.s | 10 mvk .s2 $PCR_OFFSET (S0,L1), b2
11 mvkh .s2 $PCR_OFFSET (S0,L1), b2
12 mvk .s2 $PCR_OFFSET (S0,L2), b2
13 mvkh .s2 $PCR_OFFSET (S0,L2), b2
19 S0:
|
| /external/libopus/silk/float/ |
| apply_sine_window_FLP.c | 46 silk_float freq, c, S0, S1;
61 S0 = 0.0f;
66 S0 = 1.0f;
74 px_win[ k + 0 ] = px[ k + 0 ] * 0.5f * ( S0 + S1 );
76 S0 = c * S1 - S0;
77 px_win[ k + 2 ] = px[ k + 2 ] * 0.5f * ( S1 + S0 );
78 px_win[ k + 3 ] = px[ k + 3 ] * S0;
79 S1 = c * S0 - S1;
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-tic6x/ |
| pcr-reloc.s | 11 mvk .s2 $PCR_OFFSET (S0,L1), b2
12 mvkh .s2 $PCR_OFFSET (S0,L1), b2
13 mvk .s2 $PCR_OFFSET (S0,L2), b2
14 mvkh .s2 $PCR_OFFSET (S0,L2), b2
20 S0:
|
| /external/clang/test/SemaCXX/ |
| type-definition-in-specifier.cpp | 3 struct S0;
11 struct S0 { int x; };
|
| alias-template.cpp | 56 template<typename...T> struct S0 {
|
| openmp_default_simd_align.cpp | 3 struct S0 {
6 static const int test1 = __builtin_omp_required_simd_align(decltype(S0::x));
48 static const int test1 = __builtin_omp_required_simd_align(decltype(S0::x));
|
| alignof.cpp | 5 struct S0 {
8 static const int test1 = __alignof__(S0::x); // expected-error {{invalid application of 'alignof' to a field of a class still being defined}}
50 static const int test1 = __alignof__(S0::x);
|
| /prebuilts/go/darwin-x86/test/fixedbugs/ |
| issue13337.go | 12 type S0 struct{ f int }
13 func (S0) m() {}
15 type S1 struct{ S0 }
|
| /prebuilts/go/linux-x86/test/fixedbugs/ |
| issue13337.go | 12 type S0 struct{ f int }
13 func (S0) m() {}
15 type S1 struct{ S0 }
|
| /external/clang/test/CXX/dcl.dcl/basic.namespace/namespace.def/namespace.memdef/ |
| p3.cpp | 10 struct S0 {
16 F0 f0() { return S0().member_func(); }
|
| /external/dhcpcd-6.8.2/crypt/ |
| sha256.c | 79 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
81 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3)) macro
87 t1 = S0(a) + Maj(a, b, c); \
114 W[i] = s1(W[i - 2]) + W[i - 7] + s0(W[i - 15]) + W[i - 16];
|
| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| ObjectsBenchmark.java | 32 private static final String S0 = "3";
43 dummy += Objects.hashCode(S0, S1);
51 dummy += Objects.hashCode(S0, S1, S2);
59 dummy += Objects.hashCode(S0, S1, S2, S3);
67 dummy += Objects.hashCode(S0, S1, S2, S3, S4);
76 dummy += Objects.hashCode(D0, I1, S3, I2, S0);
|
| /external/clang/test/ASTMerge/Inputs/ |
| struct1.c | 5 struct S0 {
10 struct S0 x0;
|
| struct2.c | 2 struct S0 {
7 struct S0 x0;
|
| /external/lzma/C/ |
| Sha256.c | 27 #define S0(x) (rotrFixed(x, 2) ^ rotrFixed(x,13) ^ rotrFixed(x, 22))
29 #define s0(x) (rotrFixed(x, 7) ^ rotrFixed(x,18) ^ (x >> 3))
macro
33 #define blk2(i) (W[i&15] += s1(W[(i-2)&15]) + W[(i-7)&15] + s0(W[(i-15)&15]))
51 d += h; h += S0(a) + Maj(a, b, c)
66 d(i) += h(i); h(i) += S0(a(i)) + Maj(a(i), b(i), c(i))
144 #undef S0
146 #undef s0
macro
|
| /external/swiftshader/third_party/LLVM/unittests/Analysis/ |
| ScalarEvolutionTest.cpp | 56 const SCEV *S0 = SE.getSCEV(V0);
60 const SCEV *P0 = SE.getAddExpr(S0, S0);
|
| /art/runtime/arch/arm/ |
| registers_arm.h | 57 S0 = 0,
|
