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    Searched defs:SR2 (Results 1 - 13 of 13) sorted by null

  /external/jemalloc/test/include/test/
SFMT-params11213.h 43 #define SR2 3
SFMT-params1279.h 43 #define SR2 1
SFMT-params132049.h 43 #define SR2 1
SFMT-params19937.h 43 #define SR2 1
SFMT-params216091.h 43 #define SR2 1
SFMT-params2281.h 43 #define SR2 1
SFMT-params4253.h 43 #define SR2 1
SFMT-params44497.h 43 #define SR2 3
SFMT-params607.h 43 #define SR2 3
SFMT-params86243.h 43 #define SR2 1
  /external/llvm/lib/Target/Hexagon/
HexagonGenMux.cpp 261 // SR1, SR2 - source registers from the first and the second definition.
268 unsigned SR2 = Src2->isReg() ? Src2->getReg() : 0;
278 if (CanUp && DU.Defs[SR2])
  /device/google/contexthub/firmware/os/platform/stm32/
i2c.c 115 volatile uint32_t SR2;
418 /* clear ADDR by doing a dummy reads from SR1 (already read) then SR2 */
419 (void)regs->SR2;
634 regs->SR2; // Clear ADDR
643 regs->SR2; // Clear ADDR
693 osLog(LOG_ERROR, "Unexpected I2C ERR interrupt: SR1 = %04lX, SR2 = %04lX\n",
694 regs->SR1, regs->SR2);
714 if (regs->SR2 & I2C_SR2_TRA)
  /toolchain/binutils/binutils-2.25/opcodes/
v850-opc.c 1058 #define SR2 (OLDSR2 + 1)
1062 #define FFF (SR2 + 1)
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