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      1 /*
      2  * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * Redistribution and use in source and binary forms, with or without
      5  * modification, are permitted provided that the following conditions are met:
      6  *
      7  * Redistributions of source code must retain the above copyright notice, this
      8  * list of conditions and the following disclaimer.
      9  *
     10  * Redistributions in binary form must reproduce the above copyright notice,
     11  * this list of conditions and the following disclaimer in the documentation
     12  * and/or other materials provided with the distribution.
     13  *
     14  * Neither the name of ARM nor the names of its contributors may be used
     15  * to endorse or promote products derived from this software without specific
     16  * prior written permission.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
     22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28  * POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 #ifndef __TSP_PRIVATE_H__
     32 #define __TSP_PRIVATE_H__
     33 
     34 /* Definitions to help the assembler access the SMC/ERET args structure */
     35 #define TSP_ARGS_SIZE		0x40
     36 #define TSP_ARG0		0x0
     37 #define TSP_ARG1		0x8
     38 #define TSP_ARG2		0x10
     39 #define TSP_ARG3		0x18
     40 #define TSP_ARG4		0x20
     41 #define TSP_ARG5		0x28
     42 #define TSP_ARG6		0x30
     43 #define TSP_ARG7		0x38
     44 #define TSP_ARGS_END		0x40
     45 
     46 
     47 #ifndef __ASSEMBLY__
     48 
     49 #include <cassert.h>
     50 #include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */
     51 #include <spinlock.h>
     52 #include <stdint.h>
     53 #include <tsp.h>
     54 
     55 
     56 typedef struct work_statistics {
     57 	uint32_t fiq_count;		/* Number of FIQs on this cpu */
     58 	uint32_t irq_count;		/* Number of IRQs on this cpu */
     59 	uint32_t sync_fiq_count;	/* Number of sync. fiqs on this cpu */
     60 	uint32_t sync_fiq_ret_count;	/* Number of fiq returns on this cpu */
     61 	uint32_t smc_count;		/* Number of returns on this cpu */
     62 	uint32_t eret_count;		/* Number of entries on this cpu */
     63 	uint32_t cpu_on_count;		/* Number of cpu on requests */
     64 	uint32_t cpu_off_count;		/* Number of cpu off requests */
     65 	uint32_t cpu_suspend_count;	/* Number of cpu suspend requests */
     66 	uint32_t cpu_resume_count;	/* Number of cpu resume requests */
     67 } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
     68 
     69 typedef struct tsp_args {
     70 	uint64_t _regs[TSP_ARGS_END >> 3];
     71 } __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
     72 
     73 /* Macros to access members of the above structure using their offsets */
     74 #define read_sp_arg(args, offset)	((args)->_regs[offset >> 3])
     75 #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3])	\
     76 					 = val)
     77 /*
     78  * Ensure that the assembler's view of the size of the tsp_args is the
     79  * same as the compilers
     80  */
     81 CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
     82 
     83 void tsp_get_magic(uint64_t args[4]);
     84 
     85 tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
     86 				uint64_t arg1,
     87 				uint64_t arg2,
     88 				uint64_t arg3,
     89 				uint64_t arg4,
     90 				uint64_t arg5,
     91 				uint64_t arg6,
     92 				uint64_t arg7);
     93 tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
     94 				 uint64_t arg1,
     95 				 uint64_t arg2,
     96 				 uint64_t arg3,
     97 				 uint64_t arg4,
     98 				 uint64_t arg5,
     99 				 uint64_t arg6,
    100 				 uint64_t arg7);
    101 tsp_args_t *tsp_cpu_on_main(void);
    102 tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
    103 			     uint64_t arg1,
    104 			     uint64_t arg2,
    105 			     uint64_t arg3,
    106 			     uint64_t arg4,
    107 			     uint64_t arg5,
    108 			     uint64_t arg6,
    109 			     uint64_t arg7);
    110 
    111 /* Generic Timer functions */
    112 void tsp_generic_timer_start(void);
    113 void tsp_generic_timer_handler(void);
    114 void tsp_generic_timer_stop(void);
    115 void tsp_generic_timer_save(void);
    116 void tsp_generic_timer_restore(void);
    117 
    118 /* FIQ management functions */
    119 void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3);
    120 
    121 
    122 /* Data structure to keep track of TSP statistics */
    123 extern spinlock_t console_lock;
    124 extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
    125 
    126 /* Vector table of jumps */
    127 extern tsp_vectors_t tsp_vector_table;
    128 
    129 
    130 #endif /* __ASSEMBLY__ */
    131 
    132 #endif /* __TSP_PRIVATE_H__ */
    133 
    134