1 /** @file 2 Industry Standard Definitions of SMBIOS Table Specification v3.0.0. 3 4 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> 5 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> 6 This program and the accompanying materials are licensed and made available under 7 the terms and conditions of the BSD License that accompanies this distribution. 8 The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php. 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 **/ 15 16 #ifndef __SMBIOS_STANDARD_H__ 17 #define __SMBIOS_STANDARD_H__ 18 19 /// 20 /// Reference SMBIOS 2.6, chapter 3.1.2. 21 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for 22 /// use by this specification. 23 /// 24 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00 25 26 /// 27 /// Reference SMBIOS 2.7, chapter 6.1.2. 28 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its 29 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically." 30 /// This number is not used for any other purpose by the SMBIOS specification. 31 /// 32 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE 33 34 /// 35 /// Reference SMBIOS 2.6, chapter 3.1.3. 36 /// Each text string is limited to 64 significant characters due to system MIF limitations. 37 /// Reference SMBIOS 2.7, chapter 6.1.3. 38 /// It will have no limit on the length of each individual text string. 39 /// 40 #define SMBIOS_STRING_MAX_LENGTH 64 41 42 // 43 // The length of the entire structure table (including all strings) must be reported 44 // in the Structure Table Length field of the SMBIOS Structure Table Entry Point, 45 // which is a WORD field limited to 65,535 bytes. 46 // 47 #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF 48 49 // 50 // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes. 51 // 52 #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF 53 54 /// 55 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43. 56 /// Upper-level software that interprets the SMBIOS structure-table should bypass an 57 /// Inactive structure just like a structure type that the software does not recognize. 58 /// 59 #define SMBIOS_TYPE_INACTIVE 0x007E 60 61 /// 62 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44. 63 /// The end-of-table indicator is used in the last physical structure in a table 64 /// 65 #define SMBIOS_TYPE_END_OF_TABLE 0x007F 66 67 /// 68 /// Smbios Table Entry Point Structure. 69 /// 70 #pragma pack(1) 71 typedef struct { 72 UINT8 AnchorString[4]; 73 UINT8 EntryPointStructureChecksum; 74 UINT8 EntryPointLength; 75 UINT8 MajorVersion; 76 UINT8 MinorVersion; 77 UINT16 MaxStructureSize; 78 UINT8 EntryPointRevision; 79 UINT8 FormattedArea[5]; 80 UINT8 IntermediateAnchorString[5]; 81 UINT8 IntermediateChecksum; 82 UINT16 TableLength; 83 UINT32 TableAddress; 84 UINT16 NumberOfSmbiosStructures; 85 UINT8 SmbiosBcdRevision; 86 } SMBIOS_TABLE_ENTRY_POINT; 87 88 typedef struct { 89 UINT8 AnchorString[5]; 90 UINT8 EntryPointStructureChecksum; 91 UINT8 EntryPointLength; 92 UINT8 MajorVersion; 93 UINT8 MinorVersion; 94 UINT8 DocRev; 95 UINT8 EntryPointRevision; 96 UINT8 Reserved; 97 UINT32 TableMaximumSize; 98 UINT64 TableAddress; 99 } SMBIOS_TABLE_3_0_ENTRY_POINT; 100 101 /// 102 /// The Smbios structure header. 103 /// 104 typedef struct { 105 UINT8 Type; 106 UINT8 Length; 107 UINT16 Handle; 108 } SMBIOS_STRUCTURE; 109 110 /// 111 /// String Number for a Null terminated string, 00h stands for no string available. 112 /// 113 typedef UINT8 SMBIOS_TABLE_STRING; 114 115 /// 116 /// BIOS Characteristics 117 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. 118 /// 119 typedef struct { 120 UINT32 Reserved :2; ///< Bits 0-1. 121 UINT32 Unknown :1; 122 UINT32 BiosCharacteristicsNotSupported :1; 123 UINT32 IsaIsSupported :1; 124 UINT32 McaIsSupported :1; 125 UINT32 EisaIsSupported :1; 126 UINT32 PciIsSupported :1; 127 UINT32 PcmciaIsSupported :1; 128 UINT32 PlugAndPlayIsSupported :1; 129 UINT32 ApmIsSupported :1; 130 UINT32 BiosIsUpgradable :1; 131 UINT32 BiosShadowingAllowed :1; 132 UINT32 VlVesaIsSupported :1; 133 UINT32 EscdSupportIsAvailable :1; 134 UINT32 BootFromCdIsSupported :1; 135 UINT32 SelectableBootIsSupported :1; 136 UINT32 RomBiosIsSocketed :1; 137 UINT32 BootFromPcmciaIsSupported :1; 138 UINT32 EDDSpecificationIsSupported :1; 139 UINT32 JapaneseNecFloppyIsSupported :1; 140 UINT32 JapaneseToshibaFloppyIsSupported :1; 141 UINT32 Floppy525_360IsSupported :1; 142 UINT32 Floppy525_12IsSupported :1; 143 UINT32 Floppy35_720IsSupported :1; 144 UINT32 Floppy35_288IsSupported :1; 145 UINT32 PrintScreenIsSupported :1; 146 UINT32 Keyboard8042IsSupported :1; 147 UINT32 SerialIsSupported :1; 148 UINT32 PrinterIsSupported :1; 149 UINT32 CgaMonoIsSupported :1; 150 UINT32 NecPc98 :1; 151 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor 152 ///< and bits 48-63 reserved for System Vendor. 153 } MISC_BIOS_CHARACTERISTICS; 154 155 /// 156 /// BIOS Characteristics Extension Byte 1. 157 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h 158 /// within the BIOS Information structure. 159 /// 160 typedef struct { 161 UINT8 AcpiIsSupported :1; 162 UINT8 UsbLegacyIsSupported :1; 163 UINT8 AgpIsSupported :1; 164 UINT8 I2OBootIsSupported :1; 165 UINT8 Ls120BootIsSupported :1; 166 UINT8 AtapiZipDriveBootIsSupported :1; 167 UINT8 Boot1394IsSupported :1; 168 UINT8 SmartBatteryIsSupported :1; 169 } MBCE_BIOS_RESERVED; 170 171 /// 172 /// BIOS Characteristics Extension Byte 2. 173 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h 174 /// within the BIOS Information structure. 175 /// 176 typedef struct { 177 UINT8 BiosBootSpecIsSupported :1; 178 UINT8 FunctionKeyNetworkBootIsSupported :1; 179 UINT8 TargetContentDistributionEnabled :1; 180 UINT8 UefiSpecificationSupported :1; 181 UINT8 VirtualMachineSupported :1; 182 UINT8 ExtensionByte2Reserved :3; 183 } MBCE_SYSTEM_RESERVED; 184 185 /// 186 /// BIOS Characteristics Extension Bytes. 187 /// 188 typedef struct { 189 MBCE_BIOS_RESERVED BiosReserved; 190 MBCE_SYSTEM_RESERVED SystemReserved; 191 } MISC_BIOS_CHARACTERISTICS_EXTENSION; 192 193 /// 194 /// BIOS Information (Type 0). 195 /// 196 typedef struct { 197 SMBIOS_STRUCTURE Hdr; 198 SMBIOS_TABLE_STRING Vendor; 199 SMBIOS_TABLE_STRING BiosVersion; 200 UINT16 BiosSegment; 201 SMBIOS_TABLE_STRING BiosReleaseDate; 202 UINT8 BiosSize; 203 MISC_BIOS_CHARACTERISTICS BiosCharacteristics; 204 UINT8 BIOSCharacteristicsExtensionBytes[2]; 205 UINT8 SystemBiosMajorRelease; 206 UINT8 SystemBiosMinorRelease; 207 UINT8 EmbeddedControllerFirmwareMajorRelease; 208 UINT8 EmbeddedControllerFirmwareMinorRelease; 209 } SMBIOS_TABLE_TYPE0; 210 211 /// 212 /// System Wake-up Type. 213 /// 214 typedef enum { 215 SystemWakeupTypeReserved = 0x00, 216 SystemWakeupTypeOther = 0x01, 217 SystemWakeupTypeUnknown = 0x02, 218 SystemWakeupTypeApmTimer = 0x03, 219 SystemWakeupTypeModemRing = 0x04, 220 SystemWakeupTypeLanRemote = 0x05, 221 SystemWakeupTypePowerSwitch = 0x06, 222 SystemWakeupTypePciPme = 0x07, 223 SystemWakeupTypeAcPowerRestored = 0x08 224 } MISC_SYSTEM_WAKEUP_TYPE; 225 226 /// 227 /// System Information (Type 1). 228 /// 229 /// The information in this structure defines attributes of the overall system and is 230 /// intended to be associated with the Component ID group of the system's MIF. 231 /// An SMBIOS implementation is associated with a single system instance and contains 232 /// one and only one System Information (Type 1) structure. 233 /// 234 typedef struct { 235 SMBIOS_STRUCTURE Hdr; 236 SMBIOS_TABLE_STRING Manufacturer; 237 SMBIOS_TABLE_STRING ProductName; 238 SMBIOS_TABLE_STRING Version; 239 SMBIOS_TABLE_STRING SerialNumber; 240 GUID Uuid; 241 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE. 242 SMBIOS_TABLE_STRING SKUNumber; 243 SMBIOS_TABLE_STRING Family; 244 } SMBIOS_TABLE_TYPE1; 245 246 /// 247 /// Base Board - Feature Flags. 248 /// 249 typedef struct { 250 UINT8 Motherboard :1; 251 UINT8 RequiresDaughterCard :1; 252 UINT8 Removable :1; 253 UINT8 Replaceable :1; 254 UINT8 HotSwappable :1; 255 UINT8 Reserved :3; 256 } BASE_BOARD_FEATURE_FLAGS; 257 258 /// 259 /// Base Board - Board Type. 260 /// 261 typedef enum { 262 BaseBoardTypeUnknown = 0x1, 263 BaseBoardTypeOther = 0x2, 264 BaseBoardTypeServerBlade = 0x3, 265 BaseBoardTypeConnectivitySwitch = 0x4, 266 BaseBoardTypeSystemManagementModule = 0x5, 267 BaseBoardTypeProcessorModule = 0x6, 268 BaseBoardTypeIOModule = 0x7, 269 BaseBoardTypeMemoryModule = 0x8, 270 BaseBoardTypeDaughterBoard = 0x9, 271 BaseBoardTypeMotherBoard = 0xA, 272 BaseBoardTypeProcessorMemoryModule = 0xB, 273 BaseBoardTypeProcessorIOModule = 0xC, 274 BaseBoardTypeInterconnectBoard = 0xD 275 } BASE_BOARD_TYPE; 276 277 /// 278 /// Base Board (or Module) Information (Type 2). 279 /// 280 /// The information in this structure defines attributes of a system baseboard - 281 /// for example a motherboard, planar, or server blade or other standard system module. 282 /// 283 typedef struct { 284 SMBIOS_STRUCTURE Hdr; 285 SMBIOS_TABLE_STRING Manufacturer; 286 SMBIOS_TABLE_STRING ProductName; 287 SMBIOS_TABLE_STRING Version; 288 SMBIOS_TABLE_STRING SerialNumber; 289 SMBIOS_TABLE_STRING AssetTag; 290 BASE_BOARD_FEATURE_FLAGS FeatureFlag; 291 SMBIOS_TABLE_STRING LocationInChassis; 292 UINT16 ChassisHandle; 293 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE. 294 UINT8 NumberOfContainedObjectHandles; 295 UINT16 ContainedObjectHandles[1]; 296 } SMBIOS_TABLE_TYPE2; 297 298 /// 299 /// System Enclosure or Chassis Types 300 /// 301 typedef enum { 302 MiscChassisTypeOther = 0x01, 303 MiscChassisTypeUnknown = 0x02, 304 MiscChassisTypeDeskTop = 0x03, 305 MiscChassisTypeLowProfileDesktop = 0x04, 306 MiscChassisTypePizzaBox = 0x05, 307 MiscChassisTypeMiniTower = 0x06, 308 MiscChassisTypeTower = 0x07, 309 MiscChassisTypePortable = 0x08, 310 MiscChassisTypeLapTop = 0x09, 311 MiscChassisTypeNotebook = 0x0A, 312 MiscChassisTypeHandHeld = 0x0B, 313 MiscChassisTypeDockingStation = 0x0C, 314 MiscChassisTypeAllInOne = 0x0D, 315 MiscChassisTypeSubNotebook = 0x0E, 316 MiscChassisTypeSpaceSaving = 0x0F, 317 MiscChassisTypeLunchBox = 0x10, 318 MiscChassisTypeMainServerChassis = 0x11, 319 MiscChassisTypeExpansionChassis = 0x12, 320 MiscChassisTypeSubChassis = 0x13, 321 MiscChassisTypeBusExpansionChassis = 0x14, 322 MiscChassisTypePeripheralChassis = 0x15, 323 MiscChassisTypeRaidChassis = 0x16, 324 MiscChassisTypeRackMountChassis = 0x17, 325 MiscChassisTypeSealedCasePc = 0x18, 326 MiscChassisMultiSystemChassis = 0x19, 327 MiscChassisCompactPCI = 0x1A, 328 MiscChassisAdvancedTCA = 0x1B, 329 MiscChassisBlade = 0x1C, 330 MiscChassisBladeEnclosure = 0x1D, 331 MiscChassisTablet = 0x1E, 332 MiscChassisConvertible = 0x1F, 333 MiscChassisDetachable = 0x20 334 } MISC_CHASSIS_TYPE; 335 336 /// 337 /// System Enclosure or Chassis States . 338 /// 339 typedef enum { 340 ChassisStateOther = 0x01, 341 ChassisStateUnknown = 0x02, 342 ChassisStateSafe = 0x03, 343 ChassisStateWarning = 0x04, 344 ChassisStateCritical = 0x05, 345 ChassisStateNonRecoverable = 0x06 346 } MISC_CHASSIS_STATE; 347 348 /// 349 /// System Enclosure or Chassis Security Status. 350 /// 351 typedef enum { 352 ChassisSecurityStatusOther = 0x01, 353 ChassisSecurityStatusUnknown = 0x02, 354 ChassisSecurityStatusNone = 0x03, 355 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04, 356 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05 357 } MISC_CHASSIS_SECURITY_STATE; 358 359 /// 360 /// Contained Element record 361 /// 362 typedef struct { 363 UINT8 ContainedElementType; 364 UINT8 ContainedElementMinimum; 365 UINT8 ContainedElementMaximum; 366 } CONTAINED_ELEMENT; 367 368 369 /// 370 /// System Enclosure or Chassis (Type 3). 371 /// 372 /// The information in this structure defines attributes of the system's mechanical enclosure(s). 373 /// For example, if a system included a separate enclosure for its peripheral devices, 374 /// two structures would be returned: one for the main, system enclosure and the second for 375 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification 376 /// support the population of the CIM_Chassis class. 377 /// 378 typedef struct { 379 SMBIOS_STRUCTURE Hdr; 380 SMBIOS_TABLE_STRING Manufacturer; 381 UINT8 Type; 382 SMBIOS_TABLE_STRING Version; 383 SMBIOS_TABLE_STRING SerialNumber; 384 SMBIOS_TABLE_STRING AssetTag; 385 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE. 386 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE. 387 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE. 388 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE. 389 UINT8 OemDefined[4]; 390 UINT8 Height; 391 UINT8 NumberofPowerCords; 392 UINT8 ContainedElementCount; 393 UINT8 ContainedElementRecordLength; 394 CONTAINED_ELEMENT ContainedElements[1]; 395 } SMBIOS_TABLE_TYPE3; 396 397 /// 398 /// Processor Information - Processor Type. 399 /// 400 typedef enum { 401 ProcessorOther = 0x01, 402 ProcessorUnknown = 0x02, 403 CentralProcessor = 0x03, 404 MathProcessor = 0x04, 405 DspProcessor = 0x05, 406 VideoProcessor = 0x06 407 } PROCESSOR_TYPE_DATA; 408 409 /// 410 /// Processor Information - Processor Family. 411 /// 412 typedef enum { 413 ProcessorFamilyOther = 0x01, 414 ProcessorFamilyUnknown = 0x02, 415 ProcessorFamily8086 = 0x03, 416 ProcessorFamily80286 = 0x04, 417 ProcessorFamilyIntel386 = 0x05, 418 ProcessorFamilyIntel486 = 0x06, 419 ProcessorFamily8087 = 0x07, 420 ProcessorFamily80287 = 0x08, 421 ProcessorFamily80387 = 0x09, 422 ProcessorFamily80487 = 0x0A, 423 ProcessorFamilyPentium = 0x0B, 424 ProcessorFamilyPentiumPro = 0x0C, 425 ProcessorFamilyPentiumII = 0x0D, 426 ProcessorFamilyPentiumMMX = 0x0E, 427 ProcessorFamilyCeleron = 0x0F, 428 ProcessorFamilyPentiumIIXeon = 0x10, 429 ProcessorFamilyPentiumIII = 0x11, 430 ProcessorFamilyM1 = 0x12, 431 ProcessorFamilyM2 = 0x13, 432 ProcessorFamilyIntelCeleronM = 0x14, 433 ProcessorFamilyIntelPentium4Ht = 0x15, 434 ProcessorFamilyAmdDuron = 0x18, 435 ProcessorFamilyK5 = 0x19, 436 ProcessorFamilyK6 = 0x1A, 437 ProcessorFamilyK6_2 = 0x1B, 438 ProcessorFamilyK6_3 = 0x1C, 439 ProcessorFamilyAmdAthlon = 0x1D, 440 ProcessorFamilyAmd29000 = 0x1E, 441 ProcessorFamilyK6_2Plus = 0x1F, 442 ProcessorFamilyPowerPC = 0x20, 443 ProcessorFamilyPowerPC601 = 0x21, 444 ProcessorFamilyPowerPC603 = 0x22, 445 ProcessorFamilyPowerPC603Plus = 0x23, 446 ProcessorFamilyPowerPC604 = 0x24, 447 ProcessorFamilyPowerPC620 = 0x25, 448 ProcessorFamilyPowerPCx704 = 0x26, 449 ProcessorFamilyPowerPC750 = 0x27, 450 ProcessorFamilyIntelCoreDuo = 0x28, 451 ProcessorFamilyIntelCoreDuoMobile = 0x29, 452 ProcessorFamilyIntelCoreSoloMobile = 0x2A, 453 ProcessorFamilyIntelAtom = 0x2B, 454 ProcessorFamilyIntelCoreM = 0x2C, 455 ProcessorFamilyAlpha = 0x30, 456 ProcessorFamilyAlpha21064 = 0x31, 457 ProcessorFamilyAlpha21066 = 0x32, 458 ProcessorFamilyAlpha21164 = 0x33, 459 ProcessorFamilyAlpha21164PC = 0x34, 460 ProcessorFamilyAlpha21164a = 0x35, 461 ProcessorFamilyAlpha21264 = 0x36, 462 ProcessorFamilyAlpha21364 = 0x37, 463 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38, 464 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39, 465 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A, 466 ProcessorFamilyAmdOpteron6100Series = 0x3B, 467 ProcessorFamilyAmdOpteron4100Series = 0x3C, 468 ProcessorFamilyAmdOpteron6200Series = 0x3D, 469 ProcessorFamilyAmdOpteron4200Series = 0x3E, 470 ProcessorFamilyAmdFxSeries = 0x3F, 471 ProcessorFamilyMips = 0x40, 472 ProcessorFamilyMIPSR4000 = 0x41, 473 ProcessorFamilyMIPSR4200 = 0x42, 474 ProcessorFamilyMIPSR4400 = 0x43, 475 ProcessorFamilyMIPSR4600 = 0x44, 476 ProcessorFamilyMIPSR10000 = 0x45, 477 ProcessorFamilyAmdCSeries = 0x46, 478 ProcessorFamilyAmdESeries = 0x47, 479 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name 480 ProcessorFamilyAmdGSeries = 0x49, 481 ProcessorFamilyAmdZSeries = 0x4A, 482 ProcessorFamilyAmdRSeries = 0x4B, 483 ProcessorFamilyAmdOpteron4300 = 0x4C, 484 ProcessorFamilyAmdOpteron6300 = 0x4D, 485 ProcessorFamilyAmdOpteron3300 = 0x4E, 486 ProcessorFamilyAmdFireProSeries = 0x4F, 487 ProcessorFamilySparc = 0x50, 488 ProcessorFamilySuperSparc = 0x51, 489 ProcessorFamilymicroSparcII = 0x52, 490 ProcessorFamilymicroSparcIIep = 0x53, 491 ProcessorFamilyUltraSparc = 0x54, 492 ProcessorFamilyUltraSparcII = 0x55, 493 ProcessorFamilyUltraSparcIii = 0x56, 494 ProcessorFamilyUltraSparcIII = 0x57, 495 ProcessorFamilyUltraSparcIIIi = 0x58, 496 ProcessorFamily68040 = 0x60, 497 ProcessorFamily68xxx = 0x61, 498 ProcessorFamily68000 = 0x62, 499 ProcessorFamily68010 = 0x63, 500 ProcessorFamily68020 = 0x64, 501 ProcessorFamily68030 = 0x65, 502 ProcessorFamilyAmdAthlonX4QuadCore = 0x66, 503 ProcessorFamilyAmdOpteronX1000Series = 0x67, 504 ProcessorFamilyAmdOpteronX2000Series = 0x68, 505 ProcessorFamilyHobbit = 0x70, 506 ProcessorFamilyCrusoeTM5000 = 0x78, 507 ProcessorFamilyCrusoeTM3000 = 0x79, 508 ProcessorFamilyEfficeonTM8000 = 0x7A, 509 ProcessorFamilyWeitek = 0x80, 510 ProcessorFamilyItanium = 0x82, 511 ProcessorFamilyAmdAthlon64 = 0x83, 512 ProcessorFamilyAmdOpteron = 0x84, 513 ProcessorFamilyAmdSempron = 0x85, 514 ProcessorFamilyAmdTurion64Mobile = 0x86, 515 ProcessorFamilyDualCoreAmdOpteron = 0x87, 516 ProcessorFamilyAmdAthlon64X2DualCore = 0x88, 517 ProcessorFamilyAmdTurion64X2Mobile = 0x89, 518 ProcessorFamilyQuadCoreAmdOpteron = 0x8A, 519 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B, 520 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C, 521 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D, 522 ProcessorFamilyAmdPhenomX2DualCore = 0x8E, 523 ProcessorFamilyAmdAthlonX2DualCore = 0x8F, 524 ProcessorFamilyPARISC = 0x90, 525 ProcessorFamilyPaRisc8500 = 0x91, 526 ProcessorFamilyPaRisc8000 = 0x92, 527 ProcessorFamilyPaRisc7300LC = 0x93, 528 ProcessorFamilyPaRisc7200 = 0x94, 529 ProcessorFamilyPaRisc7100LC = 0x95, 530 ProcessorFamilyPaRisc7100 = 0x96, 531 ProcessorFamilyV30 = 0xA0, 532 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1, 533 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2, 534 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3, 535 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4, 536 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5, 537 ProcessorFamilyDualCoreIntelXeonLV = 0xA6, 538 ProcessorFamilyDualCoreIntelXeonULV = 0xA7, 539 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8, 540 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9, 541 ProcessorFamilyQuadCoreIntelXeon = 0xAA, 542 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB, 543 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC, 544 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD, 545 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE, 546 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF, 547 ProcessorFamilyPentiumIIIXeon = 0xB0, 548 ProcessorFamilyPentiumIIISpeedStep = 0xB1, 549 ProcessorFamilyPentium4 = 0xB2, 550 ProcessorFamilyIntelXeon = 0xB3, 551 ProcessorFamilyAS400 = 0xB4, 552 ProcessorFamilyIntelXeonMP = 0xB5, 553 ProcessorFamilyAMDAthlonXP = 0xB6, 554 ProcessorFamilyAMDAthlonMP = 0xB7, 555 ProcessorFamilyIntelItanium2 = 0xB8, 556 ProcessorFamilyIntelPentiumM = 0xB9, 557 ProcessorFamilyIntelCeleronD = 0xBA, 558 ProcessorFamilyIntelPentiumD = 0xBB, 559 ProcessorFamilyIntelPentiumEx = 0xBC, 560 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value 561 ProcessorFamilyReserved = 0xBE, 562 ProcessorFamilyIntelCore2 = 0xBF, 563 ProcessorFamilyIntelCore2Solo = 0xC0, 564 ProcessorFamilyIntelCore2Extreme = 0xC1, 565 ProcessorFamilyIntelCore2Quad = 0xC2, 566 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3, 567 ProcessorFamilyIntelCore2DuoMobile = 0xC4, 568 ProcessorFamilyIntelCore2SoloMobile = 0xC5, 569 ProcessorFamilyIntelCoreI7 = 0xC6, 570 ProcessorFamilyDualCoreIntelCeleron = 0xC7, 571 ProcessorFamilyIBM390 = 0xC8, 572 ProcessorFamilyG4 = 0xC9, 573 ProcessorFamilyG5 = 0xCA, 574 ProcessorFamilyG6 = 0xCB, 575 ProcessorFamilyzArchitecture = 0xCC, 576 ProcessorFamilyIntelCoreI5 = 0xCD, 577 ProcessorFamilyIntelCoreI3 = 0xCE, 578 ProcessorFamilyViaC7M = 0xD2, 579 ProcessorFamilyViaC7D = 0xD3, 580 ProcessorFamilyViaC7 = 0xD4, 581 ProcessorFamilyViaEden = 0xD5, 582 ProcessorFamilyMultiCoreIntelXeon = 0xD6, 583 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7, 584 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8, 585 ProcessorFamilyViaNano = 0xD9, 586 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA, 587 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB, 588 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD, 589 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE, 590 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF, 591 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0, 592 ProcessorFamilyAmdOpteron3000Series = 0xE4, 593 ProcessorFamilyAmdSempronII = 0xE5, 594 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6, 595 ProcessorFamilyAmdPhenomTripleCore = 0xE7, 596 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8, 597 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9, 598 ProcessorFamilyAmdAthlonDualCore = 0xEA, 599 ProcessorFamilyAmdSempronSI = 0xEB, 600 ProcessorFamilyAmdPhenomII = 0xEC, 601 ProcessorFamilyAmdAthlonII = 0xED, 602 ProcessorFamilySixCoreAmdOpteron = 0xEE, 603 ProcessorFamilyAmdSempronM = 0xEF, 604 ProcessorFamilyi860 = 0xFA, 605 ProcessorFamilyi960 = 0xFB, 606 ProcessorFamilyIndicatorFamily2 = 0xFE, 607 ProcessorFamilyReserved1 = 0xFF 608 } PROCESSOR_FAMILY_DATA; 609 610 /// 611 /// Processor Information2 - Processor Family2. 612 /// 613 typedef enum { 614 ProcessorFamilySH3 = 0x0104, 615 ProcessorFamilySH4 = 0x0105, 616 ProcessorFamilyARM = 0x0118, 617 ProcessorFamilyStrongARM = 0x0119, 618 ProcessorFamily6x86 = 0x012C, 619 ProcessorFamilyMediaGX = 0x012D, 620 ProcessorFamilyMII = 0x012E, 621 ProcessorFamilyWinChip = 0x0140, 622 ProcessorFamilyDSP = 0x015E, 623 ProcessorFamilyVideoProcessor = 0x01F4 624 } PROCESSOR_FAMILY2_DATA; 625 626 /// 627 /// Processor Information - Voltage. 628 /// 629 typedef struct { 630 UINT8 ProcessorVoltageCapability5V :1; 631 UINT8 ProcessorVoltageCapability3_3V :1; 632 UINT8 ProcessorVoltageCapability2_9V :1; 633 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero. 634 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero. 635 UINT8 ProcessorVoltageIndicateLegacy :1; 636 } PROCESSOR_VOLTAGE; 637 638 /// 639 /// Processor Information - Processor Upgrade. 640 /// 641 typedef enum { 642 ProcessorUpgradeOther = 0x01, 643 ProcessorUpgradeUnknown = 0x02, 644 ProcessorUpgradeDaughterBoard = 0x03, 645 ProcessorUpgradeZIFSocket = 0x04, 646 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable. 647 ProcessorUpgradeNone = 0x06, 648 ProcessorUpgradeLIFSocket = 0x07, 649 ProcessorUpgradeSlot1 = 0x08, 650 ProcessorUpgradeSlot2 = 0x09, 651 ProcessorUpgrade370PinSocket = 0x0A, 652 ProcessorUpgradeSlotA = 0x0B, 653 ProcessorUpgradeSlotM = 0x0C, 654 ProcessorUpgradeSocket423 = 0x0D, 655 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462. 656 ProcessorUpgradeSocket478 = 0x0F, 657 ProcessorUpgradeSocket754 = 0x10, 658 ProcessorUpgradeSocket940 = 0x11, 659 ProcessorUpgradeSocket939 = 0x12, 660 ProcessorUpgradeSocketmPGA604 = 0x13, 661 ProcessorUpgradeSocketLGA771 = 0x14, 662 ProcessorUpgradeSocketLGA775 = 0x15, 663 ProcessorUpgradeSocketS1 = 0x16, 664 ProcessorUpgradeAM2 = 0x17, 665 ProcessorUpgradeF1207 = 0x18, 666 ProcessorSocketLGA1366 = 0x19, 667 ProcessorUpgradeSocketG34 = 0x1A, 668 ProcessorUpgradeSocketAM3 = 0x1B, 669 ProcessorUpgradeSocketC32 = 0x1C, 670 ProcessorUpgradeSocketLGA1156 = 0x1D, 671 ProcessorUpgradeSocketLGA1567 = 0x1E, 672 ProcessorUpgradeSocketPGA988A = 0x1F, 673 ProcessorUpgradeSocketBGA1288 = 0x20, 674 ProcessorUpgradeSocketrPGA988B = 0x21, 675 ProcessorUpgradeSocketBGA1023 = 0x22, 676 ProcessorUpgradeSocketBGA1224 = 0x23, 677 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name 678 ProcessorUpgradeSocketLGA1356 = 0x25, 679 ProcessorUpgradeSocketLGA2011 = 0x26, 680 ProcessorUpgradeSocketFS1 = 0x27, 681 ProcessorUpgradeSocketFS2 = 0x28, 682 ProcessorUpgradeSocketFM1 = 0x29, 683 ProcessorUpgradeSocketFM2 = 0x2A, 684 ProcessorUpgradeSocketLGA2011_3 = 0x2B, 685 ProcessorUpgradeSocketLGA1356_3 = 0x2C, 686 ProcessorUpgradeSocketLGA1150 = 0x2D, 687 ProcessorUpgradeSocketBGA1168 = 0x2E, 688 ProcessorUpgradeSocketBGA1234 = 0x2F, 689 ProcessorUpgradeSocketBGA1364 = 0x30 690 } PROCESSOR_UPGRADE; 691 692 /// 693 /// Processor ID Field Description 694 /// 695 typedef struct { 696 UINT32 ProcessorSteppingId:4; 697 UINT32 ProcessorModel: 4; 698 UINT32 ProcessorFamily: 4; 699 UINT32 ProcessorType: 2; 700 UINT32 ProcessorReserved1: 2; 701 UINT32 ProcessorXModel: 4; 702 UINT32 ProcessorXFamily: 8; 703 UINT32 ProcessorReserved2: 4; 704 } PROCESSOR_SIGNATURE; 705 706 typedef struct { 707 UINT32 ProcessorFpu :1; 708 UINT32 ProcessorVme :1; 709 UINT32 ProcessorDe :1; 710 UINT32 ProcessorPse :1; 711 UINT32 ProcessorTsc :1; 712 UINT32 ProcessorMsr :1; 713 UINT32 ProcessorPae :1; 714 UINT32 ProcessorMce :1; 715 UINT32 ProcessorCx8 :1; 716 UINT32 ProcessorApic :1; 717 UINT32 ProcessorReserved1 :1; 718 UINT32 ProcessorSep :1; 719 UINT32 ProcessorMtrr :1; 720 UINT32 ProcessorPge :1; 721 UINT32 ProcessorMca :1; 722 UINT32 ProcessorCmov :1; 723 UINT32 ProcessorPat :1; 724 UINT32 ProcessorPse36 :1; 725 UINT32 ProcessorPsn :1; 726 UINT32 ProcessorClfsh :1; 727 UINT32 ProcessorReserved2 :1; 728 UINT32 ProcessorDs :1; 729 UINT32 ProcessorAcpi :1; 730 UINT32 ProcessorMmx :1; 731 UINT32 ProcessorFxsr :1; 732 UINT32 ProcessorSse :1; 733 UINT32 ProcessorSse2 :1; 734 UINT32 ProcessorSs :1; 735 UINT32 ProcessorReserved3 :1; 736 UINT32 ProcessorTm :1; 737 UINT32 ProcessorReserved4 :2; 738 } PROCESSOR_FEATURE_FLAGS; 739 740 typedef struct { 741 PROCESSOR_SIGNATURE Signature; 742 PROCESSOR_FEATURE_FLAGS FeatureFlags; 743 } PROCESSOR_ID_DATA; 744 745 /// 746 /// Processor Information (Type 4). 747 /// 748 /// The information in this structure defines the attributes of a single processor; 749 /// a separate structure instance is provided for each system processor socket/slot. 750 /// For example, a system with an IntelDX2 processor would have a single 751 /// structure instance, while a system with an IntelSX2 processor would have a structure 752 /// to describe the main CPU, and a second structure to describe the 80487 co-processor. 753 /// 754 typedef struct { 755 SMBIOS_STRUCTURE Hdr; 756 SMBIOS_TABLE_STRING Socket; 757 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA. 758 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA. 759 SMBIOS_TABLE_STRING ProcessorManufacture; 760 PROCESSOR_ID_DATA ProcessorId; 761 SMBIOS_TABLE_STRING ProcessorVersion; 762 PROCESSOR_VOLTAGE Voltage; 763 UINT16 ExternalClock; 764 UINT16 MaxSpeed; 765 UINT16 CurrentSpeed; 766 UINT8 Status; 767 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE. 768 UINT16 L1CacheHandle; 769 UINT16 L2CacheHandle; 770 UINT16 L3CacheHandle; 771 SMBIOS_TABLE_STRING SerialNumber; 772 SMBIOS_TABLE_STRING AssetTag; 773 SMBIOS_TABLE_STRING PartNumber; 774 // 775 // Add for smbios 2.5 776 // 777 UINT8 CoreCount; 778 UINT8 EnabledCoreCount; 779 UINT8 ThreadCount; 780 UINT16 ProcessorCharacteristics; 781 // 782 // Add for smbios 2.6 783 // 784 UINT16 ProcessorFamily2; 785 // 786 // Add for smbios 3.0 787 // 788 UINT16 CoreCount2; 789 UINT16 EnabledCoreCount2; 790 UINT16 ThreadCount2; 791 } SMBIOS_TABLE_TYPE4; 792 793 /// 794 /// Memory Controller Error Detecting Method. 795 /// 796 typedef enum { 797 ErrorDetectingMethodOther = 0x01, 798 ErrorDetectingMethodUnknown = 0x02, 799 ErrorDetectingMethodNone = 0x03, 800 ErrorDetectingMethodParity = 0x04, 801 ErrorDetectingMethod32Ecc = 0x05, 802 ErrorDetectingMethod64Ecc = 0x06, 803 ErrorDetectingMethod128Ecc = 0x07, 804 ErrorDetectingMethodCrc = 0x08 805 } MEMORY_ERROR_DETECT_METHOD; 806 807 /// 808 /// Memory Controller Error Correcting Capability. 809 /// 810 typedef struct { 811 UINT8 Other :1; 812 UINT8 Unknown :1; 813 UINT8 None :1; 814 UINT8 SingleBitErrorCorrect :1; 815 UINT8 DoubleBitErrorCorrect :1; 816 UINT8 ErrorScrubbing :1; 817 UINT8 Reserved :2; 818 } MEMORY_ERROR_CORRECT_CAPABILITY; 819 820 /// 821 /// Memory Controller Information - Interleave Support. 822 /// 823 typedef enum { 824 MemoryInterleaveOther = 0x01, 825 MemoryInterleaveUnknown = 0x02, 826 MemoryInterleaveOneWay = 0x03, 827 MemoryInterleaveTwoWay = 0x04, 828 MemoryInterleaveFourWay = 0x05, 829 MemoryInterleaveEightWay = 0x06, 830 MemoryInterleaveSixteenWay = 0x07 831 } MEMORY_SUPPORT_INTERLEAVE_TYPE; 832 833 /// 834 /// Memory Controller Information - Memory Speeds. 835 /// 836 typedef struct { 837 UINT16 Other :1; 838 UINT16 Unknown :1; 839 UINT16 SeventyNs:1; 840 UINT16 SixtyNs :1; 841 UINT16 FiftyNs :1; 842 UINT16 Reserved :11; 843 } MEMORY_SPEED_TYPE; 844 845 /// 846 /// Memory Controller Information (Type 5, Obsolete). 847 /// 848 /// The information in this structure defines the attributes of the system's memory controller(s) 849 /// and the supported attributes of any memory-modules present in the sockets controlled by 850 /// this controller. 851 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), 852 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16) 853 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might 854 /// choose to implement both memory description types to allow existing DMI browsers 855 /// to properly display the system's memory attributes. 856 /// 857 typedef struct { 858 SMBIOS_STRUCTURE Hdr; 859 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD. 860 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability; 861 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE. 862 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . 863 UINT8 MaxMemoryModuleSize; 864 MEMORY_SPEED_TYPE SupportSpeed; 865 UINT16 SupportMemoryType; 866 UINT8 MemoryModuleVoltage; 867 UINT8 AssociatedMemorySlotNum; 868 UINT16 MemoryModuleConfigHandles[1]; 869 } SMBIOS_TABLE_TYPE5; 870 871 /// 872 /// Memory Module Information - Memory Types 873 /// 874 typedef struct { 875 UINT16 Other :1; 876 UINT16 Unknown :1; 877 UINT16 Standard :1; 878 UINT16 FastPageMode:1; 879 UINT16 Edo :1; 880 UINT16 Parity :1; 881 UINT16 Ecc :1; 882 UINT16 Simm :1; 883 UINT16 Dimm :1; 884 UINT16 BurstEdo :1; 885 UINT16 Sdram :1; 886 UINT16 Reserved :5; 887 } MEMORY_CURRENT_TYPE; 888 889 /// 890 /// Memory Module Information - Memory Size. 891 /// 892 typedef struct { 893 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB. 894 UINT8 SingleOrDoubleBank :1; 895 } MEMORY_INSTALLED_ENABLED_SIZE; 896 897 /// 898 /// Memory Module Information (Type 6, Obsolete) 899 /// 900 /// One Memory Module Information structure is included for each memory-module socket 901 /// in the system. The structure describes the speed, type, size, and error status 902 /// of each system memory module. The supported attributes of each module are described 903 /// by the "owning" Memory Controller Information structure. 904 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), 905 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16) 906 /// and Memory Device (Type 17) structures should be used instead. 907 /// 908 typedef struct { 909 SMBIOS_STRUCTURE Hdr; 910 SMBIOS_TABLE_STRING SocketDesignation; 911 UINT8 BankConnections; 912 UINT8 CurrentSpeed; 913 MEMORY_CURRENT_TYPE CurrentMemoryType; 914 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize; 915 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize; 916 UINT8 ErrorStatus; 917 } SMBIOS_TABLE_TYPE6; 918 919 /// 920 /// Cache Information - SRAM Type. 921 /// 922 typedef struct { 923 UINT16 Other :1; 924 UINT16 Unknown :1; 925 UINT16 NonBurst :1; 926 UINT16 Burst :1; 927 UINT16 PipelineBurst :1; 928 UINT16 Synchronous :1; 929 UINT16 Asynchronous :1; 930 UINT16 Reserved :9; 931 } CACHE_SRAM_TYPE_DATA; 932 933 /// 934 /// Cache Information - Error Correction Type. 935 /// 936 typedef enum { 937 CacheErrorOther = 0x01, 938 CacheErrorUnknown = 0x02, 939 CacheErrorNone = 0x03, 940 CacheErrorParity = 0x04, 941 CacheErrorSingleBit = 0x05, ///< ECC 942 CacheErrorMultiBit = 0x06 ///< ECC 943 } CACHE_ERROR_TYPE_DATA; 944 945 /// 946 /// Cache Information - System Cache Type. 947 /// 948 typedef enum { 949 CacheTypeOther = 0x01, 950 CacheTypeUnknown = 0x02, 951 CacheTypeInstruction = 0x03, 952 CacheTypeData = 0x04, 953 CacheTypeUnified = 0x05 954 } CACHE_TYPE_DATA; 955 956 /// 957 /// Cache Information - Associativity. 958 /// 959 typedef enum { 960 CacheAssociativityOther = 0x01, 961 CacheAssociativityUnknown = 0x02, 962 CacheAssociativityDirectMapped = 0x03, 963 CacheAssociativity2Way = 0x04, 964 CacheAssociativity4Way = 0x05, 965 CacheAssociativityFully = 0x06, 966 CacheAssociativity8Way = 0x07, 967 CacheAssociativity16Way = 0x08, 968 CacheAssociativity12Way = 0x09, 969 CacheAssociativity24Way = 0x0A, 970 CacheAssociativity32Way = 0x0B, 971 CacheAssociativity48Way = 0x0C, 972 CacheAssociativity64Way = 0x0D, 973 CacheAssociativity20Way = 0x0E 974 } CACHE_ASSOCIATIVITY_DATA; 975 976 /// 977 /// Cache Information (Type 7). 978 /// 979 /// The information in this structure defines the attributes of CPU cache device in the system. 980 /// One structure is specified for each such device, whether the device is internal to 981 /// or external to the CPU module. Cache modules can be associated with a processor structure 982 /// in one or two ways, depending on the SMBIOS version. 983 /// 984 typedef struct { 985 SMBIOS_STRUCTURE Hdr; 986 SMBIOS_TABLE_STRING SocketDesignation; 987 UINT16 CacheConfiguration; 988 UINT16 MaximumCacheSize; 989 UINT16 InstalledSize; 990 CACHE_SRAM_TYPE_DATA SupportedSRAMType; 991 CACHE_SRAM_TYPE_DATA CurrentSRAMType; 992 UINT8 CacheSpeed; 993 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA. 994 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA. 995 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA. 996 } SMBIOS_TABLE_TYPE7; 997 998 /// 999 /// Port Connector Information - Connector Types. 1000 /// 1001 typedef enum { 1002 PortConnectorTypeNone = 0x00, 1003 PortConnectorTypeCentronics = 0x01, 1004 PortConnectorTypeMiniCentronics = 0x02, 1005 PortConnectorTypeProprietary = 0x03, 1006 PortConnectorTypeDB25Male = 0x04, 1007 PortConnectorTypeDB25Female = 0x05, 1008 PortConnectorTypeDB15Male = 0x06, 1009 PortConnectorTypeDB15Female = 0x07, 1010 PortConnectorTypeDB9Male = 0x08, 1011 PortConnectorTypeDB9Female = 0x09, 1012 PortConnectorTypeRJ11 = 0x0A, 1013 PortConnectorTypeRJ45 = 0x0B, 1014 PortConnectorType50PinMiniScsi = 0x0C, 1015 PortConnectorTypeMiniDin = 0x0D, 1016 PortConnectorTypeMicroDin = 0x0E, 1017 PortConnectorTypePS2 = 0x0F, 1018 PortConnectorTypeInfrared = 0x10, 1019 PortConnectorTypeHpHil = 0x11, 1020 PortConnectorTypeUsb = 0x12, 1021 PortConnectorTypeSsaScsi = 0x13, 1022 PortConnectorTypeCircularDin8Male = 0x14, 1023 PortConnectorTypeCircularDin8Female = 0x15, 1024 PortConnectorTypeOnboardIde = 0x16, 1025 PortConnectorTypeOnboardFloppy = 0x17, 1026 PortConnectorType9PinDualInline = 0x18, 1027 PortConnectorType25PinDualInline = 0x19, 1028 PortConnectorType50PinDualInline = 0x1A, 1029 PortConnectorType68PinDualInline = 0x1B, 1030 PortConnectorTypeOnboardSoundInput = 0x1C, 1031 PortConnectorTypeMiniCentronicsType14 = 0x1D, 1032 PortConnectorTypeMiniCentronicsType26 = 0x1E, 1033 PortConnectorTypeHeadPhoneMiniJack = 0x1F, 1034 PortConnectorTypeBNC = 0x20, 1035 PortConnectorType1394 = 0x21, 1036 PortConnectorTypeSasSata = 0x22, 1037 PortConnectorTypePC98 = 0xA0, 1038 PortConnectorTypePC98Hireso = 0xA1, 1039 PortConnectorTypePCH98 = 0xA2, 1040 PortConnectorTypePC98Note = 0xA3, 1041 PortConnectorTypePC98Full = 0xA4, 1042 PortConnectorTypeOther = 0xFF 1043 } MISC_PORT_CONNECTOR_TYPE; 1044 1045 /// 1046 /// Port Connector Information - Port Types 1047 /// 1048 typedef enum { 1049 PortTypeNone = 0x00, 1050 PortTypeParallelXtAtCompatible = 0x01, 1051 PortTypeParallelPortPs2 = 0x02, 1052 PortTypeParallelPortEcp = 0x03, 1053 PortTypeParallelPortEpp = 0x04, 1054 PortTypeParallelPortEcpEpp = 0x05, 1055 PortTypeSerialXtAtCompatible = 0x06, 1056 PortTypeSerial16450Compatible = 0x07, 1057 PortTypeSerial16550Compatible = 0x08, 1058 PortTypeSerial16550ACompatible = 0x09, 1059 PortTypeScsi = 0x0A, 1060 PortTypeMidi = 0x0B, 1061 PortTypeJoyStick = 0x0C, 1062 PortTypeKeyboard = 0x0D, 1063 PortTypeMouse = 0x0E, 1064 PortTypeSsaScsi = 0x0F, 1065 PortTypeUsb = 0x10, 1066 PortTypeFireWire = 0x11, 1067 PortTypePcmciaTypeI = 0x12, 1068 PortTypePcmciaTypeII = 0x13, 1069 PortTypePcmciaTypeIII = 0x14, 1070 PortTypeCardBus = 0x15, 1071 PortTypeAccessBusPort = 0x16, 1072 PortTypeScsiII = 0x17, 1073 PortTypeScsiWide = 0x18, 1074 PortTypePC98 = 0x19, 1075 PortTypePC98Hireso = 0x1A, 1076 PortTypePCH98 = 0x1B, 1077 PortTypeVideoPort = 0x1C, 1078 PortTypeAudioPort = 0x1D, 1079 PortTypeModemPort = 0x1E, 1080 PortTypeNetworkPort = 0x1F, 1081 PortTypeSata = 0x20, 1082 PortTypeSas = 0x21, 1083 PortType8251Compatible = 0xA0, 1084 PortType8251FifoCompatible = 0xA1, 1085 PortTypeOther = 0xFF 1086 } MISC_PORT_TYPE; 1087 1088 /// 1089 /// Port Connector Information (Type 8). 1090 /// 1091 /// The information in this structure defines the attributes of a system port connector, 1092 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information 1093 /// are provided. One structure is present for each port provided by the system. 1094 /// 1095 typedef struct { 1096 SMBIOS_STRUCTURE Hdr; 1097 SMBIOS_TABLE_STRING InternalReferenceDesignator; 1098 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE. 1099 SMBIOS_TABLE_STRING ExternalReferenceDesignator; 1100 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE. 1101 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE. 1102 } SMBIOS_TABLE_TYPE8; 1103 1104 /// 1105 /// System Slots - Slot Type 1106 /// 1107 typedef enum { 1108 SlotTypeOther = 0x01, 1109 SlotTypeUnknown = 0x02, 1110 SlotTypeIsa = 0x03, 1111 SlotTypeMca = 0x04, 1112 SlotTypeEisa = 0x05, 1113 SlotTypePci = 0x06, 1114 SlotTypePcmcia = 0x07, 1115 SlotTypeVlVesa = 0x08, 1116 SlotTypeProprietary = 0x09, 1117 SlotTypeProcessorCardSlot = 0x0A, 1118 SlotTypeProprietaryMemoryCardSlot = 0x0B, 1119 SlotTypeIORiserCardSlot = 0x0C, 1120 SlotTypeNuBus = 0x0D, 1121 SlotTypePci66MhzCapable = 0x0E, 1122 SlotTypeAgp = 0x0F, 1123 SlotTypeApg2X = 0x10, 1124 SlotTypeAgp4X = 0x11, 1125 SlotTypePciX = 0x12, 1126 SlotTypeAgp8X = 0x13, 1127 SlotTypeM2Socket1_DP = 0x14, 1128 SlotTypeM2Socket1_SD = 0x15, 1129 SlotTypeM2Socket2 = 0x16, 1130 SlotTypeM2Socket3 = 0x17, 1131 SlotTypeMxmTypeI = 0x18, 1132 SlotTypeMxmTypeII = 0x19, 1133 SlotTypeMxmTypeIIIStandard = 0x1A, 1134 SlotTypeMxmTypeIIIHe = 0x1B, 1135 SlotTypeMxmTypeIV = 0x1C, 1136 SlotTypeMxm30TypeA = 0x1D, 1137 SlotTypeMxm30TypeB = 0x1E, 1138 SlotTypePciExpressGen2Sff_8639 = 0x1F, 1139 SlotTypePciExpressGen3Sff_8639 = 0x20, 1140 SlotTypePC98C20 = 0xA0, 1141 SlotTypePC98C24 = 0xA1, 1142 SlotTypePC98E = 0xA2, 1143 SlotTypePC98LocalBus = 0xA3, 1144 SlotTypePC98Card = 0xA4, 1145 SlotTypePciExpress = 0xA5, 1146 SlotTypePciExpressX1 = 0xA6, 1147 SlotTypePciExpressX2 = 0xA7, 1148 SlotTypePciExpressX4 = 0xA8, 1149 SlotTypePciExpressX8 = 0xA9, 1150 SlotTypePciExpressX16 = 0xAA, 1151 SlotTypePciExpressGen2 = 0xAB, 1152 SlotTypePciExpressGen2X1 = 0xAC, 1153 SlotTypePciExpressGen2X2 = 0xAD, 1154 SlotTypePciExpressGen2X4 = 0xAE, 1155 SlotTypePciExpressGen2X8 = 0xAF, 1156 SlotTypePciExpressGen2X16 = 0xB0, 1157 SlotTypePciExpressGen3 = 0xB1, 1158 SlotTypePciExpressGen3X1 = 0xB2, 1159 SlotTypePciExpressGen3X2 = 0xB3, 1160 SlotTypePciExpressGen3X4 = 0xB4, 1161 SlotTypePciExpressGen3X8 = 0xB5, 1162 SlotTypePciExpressGen3X16 = 0xB6 1163 } MISC_SLOT_TYPE; 1164 1165 /// 1166 /// System Slots - Slot Data Bus Width. 1167 /// 1168 typedef enum { 1169 SlotDataBusWidthOther = 0x01, 1170 SlotDataBusWidthUnknown = 0x02, 1171 SlotDataBusWidth8Bit = 0x03, 1172 SlotDataBusWidth16Bit = 0x04, 1173 SlotDataBusWidth32Bit = 0x05, 1174 SlotDataBusWidth64Bit = 0x06, 1175 SlotDataBusWidth128Bit = 0x07, 1176 SlotDataBusWidth1X = 0x08, ///< Or X1 1177 SlotDataBusWidth2X = 0x09, ///< Or X2 1178 SlotDataBusWidth4X = 0x0A, ///< Or X4 1179 SlotDataBusWidth8X = 0x0B, ///< Or X8 1180 SlotDataBusWidth12X = 0x0C, ///< Or X12 1181 SlotDataBusWidth16X = 0x0D, ///< Or X16 1182 SlotDataBusWidth32X = 0x0E ///< Or X32 1183 } MISC_SLOT_DATA_BUS_WIDTH; 1184 1185 /// 1186 /// System Slots - Current Usage. 1187 /// 1188 typedef enum { 1189 SlotUsageOther = 0x01, 1190 SlotUsageUnknown = 0x02, 1191 SlotUsageAvailable = 0x03, 1192 SlotUsageInUse = 0x04 1193 } MISC_SLOT_USAGE; 1194 1195 /// 1196 /// System Slots - Slot Length. 1197 /// 1198 typedef enum { 1199 SlotLengthOther = 0x01, 1200 SlotLengthUnknown = 0x02, 1201 SlotLengthShort = 0x03, 1202 SlotLengthLong = 0x04 1203 } MISC_SLOT_LENGTH; 1204 1205 /// 1206 /// System Slots - Slot Characteristics 1. 1207 /// 1208 typedef struct { 1209 UINT8 CharacteristicsUnknown :1; 1210 UINT8 Provides50Volts :1; 1211 UINT8 Provides33Volts :1; 1212 UINT8 SharedSlot :1; 1213 UINT8 PcCard16Supported :1; 1214 UINT8 CardBusSupported :1; 1215 UINT8 ZoomVideoSupported :1; 1216 UINT8 ModemRingResumeSupported:1; 1217 } MISC_SLOT_CHARACTERISTICS1; 1218 /// 1219 /// System Slots - Slot Characteristics 2. 1220 /// 1221 typedef struct { 1222 UINT8 PmeSignalSupported :1; 1223 UINT8 HotPlugDevicesSupported :1; 1224 UINT8 SmbusSignalSupported :1; 1225 UINT8 Reserved :5; ///< Set to 0. 1226 } MISC_SLOT_CHARACTERISTICS2; 1227 1228 /// 1229 /// System Slots (Type 9) 1230 /// 1231 /// The information in this structure defines the attributes of a system slot. 1232 /// One structure is provided for each slot in the system. 1233 /// 1234 /// 1235 typedef struct { 1236 SMBIOS_STRUCTURE Hdr; 1237 SMBIOS_TABLE_STRING SlotDesignation; 1238 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE. 1239 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH. 1240 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE. 1241 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH. 1242 UINT16 SlotID; 1243 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1; 1244 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2; 1245 // 1246 // Add for smbios 2.6 1247 // 1248 UINT16 SegmentGroupNum; 1249 UINT8 BusNum; 1250 UINT8 DevFuncNum; 1251 } SMBIOS_TABLE_TYPE9; 1252 1253 /// 1254 /// On Board Devices Information - Device Types. 1255 /// 1256 typedef enum { 1257 OnBoardDeviceTypeOther = 0x01, 1258 OnBoardDeviceTypeUnknown = 0x02, 1259 OnBoardDeviceTypeVideo = 0x03, 1260 OnBoardDeviceTypeScsiController = 0x04, 1261 OnBoardDeviceTypeEthernet = 0x05, 1262 OnBoardDeviceTypeTokenRing = 0x06, 1263 OnBoardDeviceTypeSound = 0x07, 1264 OnBoardDeviceTypePATAController = 0x08, 1265 OnBoardDeviceTypeSATAController = 0x09, 1266 OnBoardDeviceTypeSASController = 0x0A 1267 } MISC_ONBOARD_DEVICE_TYPE; 1268 1269 /// 1270 /// Device Item Entry 1271 /// 1272 typedef struct { 1273 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE. 1274 ///< Bit 7 - 1 : device enabled, 0 : device disabled. 1275 SMBIOS_TABLE_STRING DescriptionString; 1276 } DEVICE_STRUCT; 1277 1278 /// 1279 /// On Board Devices Information (Type 10, obsolete). 1280 /// 1281 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended 1282 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both 1283 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. 1284 /// The information in this structure defines the attributes of devices that are onboard (soldered onto) 1285 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS 1286 /// has some level of control over the enabling of the associated device for use by the system. 1287 /// 1288 typedef struct { 1289 SMBIOS_STRUCTURE Hdr; 1290 DEVICE_STRUCT Device[1]; 1291 } SMBIOS_TABLE_TYPE10; 1292 1293 /// 1294 /// OEM Strings (Type 11). 1295 /// This structure contains free form strings defined by the OEM. Examples of this are: 1296 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. 1297 /// 1298 typedef struct { 1299 SMBIOS_STRUCTURE Hdr; 1300 UINT8 StringCount; 1301 } SMBIOS_TABLE_TYPE11; 1302 1303 /// 1304 /// System Configuration Options (Type 12). 1305 /// 1306 /// This structure contains information required to configure the base board's Jumpers and Switches. 1307 /// 1308 typedef struct { 1309 SMBIOS_STRUCTURE Hdr; 1310 UINT8 StringCount; 1311 } SMBIOS_TABLE_TYPE12; 1312 1313 1314 /// 1315 /// BIOS Language Information (Type 13). 1316 /// 1317 /// The information in this structure defines the installable language attributes of the BIOS. 1318 /// 1319 typedef struct { 1320 SMBIOS_STRUCTURE Hdr; 1321 UINT8 InstallableLanguages; 1322 UINT8 Flags; 1323 UINT8 Reserved[15]; 1324 SMBIOS_TABLE_STRING CurrentLanguages; 1325 } SMBIOS_TABLE_TYPE13; 1326 1327 /// 1328 /// Group Item Entry 1329 /// 1330 typedef struct { 1331 UINT8 ItemType; 1332 UINT16 ItemHandle; 1333 } GROUP_STRUCT; 1334 1335 /// 1336 /// Group Associations (Type 14). 1337 /// 1338 /// The Group Associations structure is provided for OEMs who want to specify 1339 /// the arrangement or hierarchy of certain components (including other Group Associations) 1340 /// within the system. 1341 /// 1342 typedef struct { 1343 SMBIOS_STRUCTURE Hdr; 1344 SMBIOS_TABLE_STRING GroupName; 1345 GROUP_STRUCT Group[1]; 1346 } SMBIOS_TABLE_TYPE14; 1347 1348 /// 1349 /// System Event Log - Event Log Types. 1350 /// 1351 typedef enum { 1352 EventLogTypeReserved = 0x00, 1353 EventLogTypeSingleBitECC = 0x01, 1354 EventLogTypeMultiBitECC = 0x02, 1355 EventLogTypeParityMemErr = 0x03, 1356 EventLogTypeBusTimeOut = 0x04, 1357 EventLogTypeIOChannelCheck = 0x05, 1358 EventLogTypeSoftwareNMI = 0x06, 1359 EventLogTypePOSTMemResize = 0x07, 1360 EventLogTypePOSTErr = 0x08, 1361 EventLogTypePCIParityErr = 0x09, 1362 EventLogTypePCISystemErr = 0x0A, 1363 EventLogTypeCPUFailure = 0x0B, 1364 EventLogTypeEISATimeOut = 0x0C, 1365 EventLogTypeMemLogDisabled = 0x0D, 1366 EventLogTypeLoggingDisabled = 0x0E, 1367 EventLogTypeSysLimitExce = 0x10, 1368 EventLogTypeAsyncHWTimer = 0x11, 1369 EventLogTypeSysConfigInfo = 0x12, 1370 EventLogTypeHDInfo = 0x13, 1371 EventLogTypeSysReconfig = 0x14, 1372 EventLogTypeUncorrectCPUErr = 0x15, 1373 EventLogTypeAreaResetAndClr = 0x16, 1374 EventLogTypeSystemBoot = 0x17, 1375 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F 1376 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE 1377 EventLogTypeEndOfLog = 0xFF 1378 } EVENT_LOG_TYPE_DATA; 1379 1380 /// 1381 /// System Event Log - Variable Data Format Types. 1382 /// 1383 typedef enum { 1384 EventLogVariableNone = 0x00, 1385 EventLogVariableHandle = 0x01, 1386 EventLogVariableMutilEvent = 0x02, 1387 EventLogVariableMutilEventHandle = 0x03, 1388 EventLogVariablePOSTResultBitmap = 0x04, 1389 EventLogVariableSysManagementType = 0x05, 1390 EventLogVariableMutliEventSysManagmentType = 0x06, 1391 EventLogVariableUnused = 0x07, 1392 EventLogVariableOEMAssigned = 0x80 1393 } EVENT_LOG_VARIABLE_DATA; 1394 1395 /// 1396 /// Event Log Type Descriptors 1397 /// 1398 typedef struct { 1399 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA. 1400 UINT8 DataFormatType; 1401 } EVENT_LOG_TYPE; 1402 1403 /// 1404 /// System Event Log (Type 15). 1405 /// 1406 /// The presence of this structure within the SMBIOS data returned for a system indicates 1407 /// that the system supports an event log. An event log is a fixed-length area within a 1408 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header 1409 /// record, followed by one or more variable-length log records. 1410 /// 1411 typedef struct { 1412 SMBIOS_STRUCTURE Hdr; 1413 UINT16 LogAreaLength; 1414 UINT16 LogHeaderStartOffset; 1415 UINT16 LogDataStartOffset; 1416 UINT8 AccessMethod; 1417 UINT8 LogStatus; 1418 UINT32 LogChangeToken; 1419 UINT32 AccessMethodAddress; 1420 UINT8 LogHeaderFormat; 1421 UINT8 NumberOfSupportedLogTypeDescriptors; 1422 UINT8 LengthOfLogTypeDescriptor; 1423 EVENT_LOG_TYPE EventLogTypeDescriptors[1]; 1424 } SMBIOS_TABLE_TYPE15; 1425 1426 /// 1427 /// Physical Memory Array - Location. 1428 /// 1429 typedef enum { 1430 MemoryArrayLocationOther = 0x01, 1431 MemoryArrayLocationUnknown = 0x02, 1432 MemoryArrayLocationSystemBoard = 0x03, 1433 MemoryArrayLocationIsaAddonCard = 0x04, 1434 MemoryArrayLocationEisaAddonCard = 0x05, 1435 MemoryArrayLocationPciAddonCard = 0x06, 1436 MemoryArrayLocationMcaAddonCard = 0x07, 1437 MemoryArrayLocationPcmciaAddonCard = 0x08, 1438 MemoryArrayLocationProprietaryAddonCard = 0x09, 1439 MemoryArrayLocationNuBus = 0x0A, 1440 MemoryArrayLocationPc98C20AddonCard = 0xA0, 1441 MemoryArrayLocationPc98C24AddonCard = 0xA1, 1442 MemoryArrayLocationPc98EAddonCard = 0xA2, 1443 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3 1444 } MEMORY_ARRAY_LOCATION; 1445 1446 /// 1447 /// Physical Memory Array - Use. 1448 /// 1449 typedef enum { 1450 MemoryArrayUseOther = 0x01, 1451 MemoryArrayUseUnknown = 0x02, 1452 MemoryArrayUseSystemMemory = 0x03, 1453 MemoryArrayUseVideoMemory = 0x04, 1454 MemoryArrayUseFlashMemory = 0x05, 1455 MemoryArrayUseNonVolatileRam = 0x06, 1456 MemoryArrayUseCacheMemory = 0x07 1457 } MEMORY_ARRAY_USE; 1458 1459 /// 1460 /// Physical Memory Array - Error Correction Types. 1461 /// 1462 typedef enum { 1463 MemoryErrorCorrectionOther = 0x01, 1464 MemoryErrorCorrectionUnknown = 0x02, 1465 MemoryErrorCorrectionNone = 0x03, 1466 MemoryErrorCorrectionParity = 0x04, 1467 MemoryErrorCorrectionSingleBitEcc = 0x05, 1468 MemoryErrorCorrectionMultiBitEcc = 0x06, 1469 MemoryErrorCorrectionCrc = 0x07 1470 } MEMORY_ERROR_CORRECTION; 1471 1472 /// 1473 /// Physical Memory Array (Type 16). 1474 /// 1475 /// This structure describes a collection of memory devices that operate 1476 /// together to form a memory address space. 1477 /// 1478 typedef struct { 1479 SMBIOS_STRUCTURE Hdr; 1480 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION. 1481 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE. 1482 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION. 1483 UINT32 MaximumCapacity; 1484 UINT16 MemoryErrorInformationHandle; 1485 UINT16 NumberOfMemoryDevices; 1486 // 1487 // Add for smbios 2.7 1488 // 1489 UINT64 ExtendedMaximumCapacity; 1490 } SMBIOS_TABLE_TYPE16; 1491 1492 /// 1493 /// Memory Device - Form Factor. 1494 /// 1495 typedef enum { 1496 MemoryFormFactorOther = 0x01, 1497 MemoryFormFactorUnknown = 0x02, 1498 MemoryFormFactorSimm = 0x03, 1499 MemoryFormFactorSip = 0x04, 1500 MemoryFormFactorChip = 0x05, 1501 MemoryFormFactorDip = 0x06, 1502 MemoryFormFactorZip = 0x07, 1503 MemoryFormFactorProprietaryCard = 0x08, 1504 MemoryFormFactorDimm = 0x09, 1505 MemoryFormFactorTsop = 0x0A, 1506 MemoryFormFactorRowOfChips = 0x0B, 1507 MemoryFormFactorRimm = 0x0C, 1508 MemoryFormFactorSodimm = 0x0D, 1509 MemoryFormFactorSrimm = 0x0E, 1510 MemoryFormFactorFbDimm = 0x0F 1511 } MEMORY_FORM_FACTOR; 1512 1513 /// 1514 /// Memory Device - Type 1515 /// 1516 typedef enum { 1517 MemoryTypeOther = 0x01, 1518 MemoryTypeUnknown = 0x02, 1519 MemoryTypeDram = 0x03, 1520 MemoryTypeEdram = 0x04, 1521 MemoryTypeVram = 0x05, 1522 MemoryTypeSram = 0x06, 1523 MemoryTypeRam = 0x07, 1524 MemoryTypeRom = 0x08, 1525 MemoryTypeFlash = 0x09, 1526 MemoryTypeEeprom = 0x0A, 1527 MemoryTypeFeprom = 0x0B, 1528 MemoryTypeEprom = 0x0C, 1529 MemoryTypeCdram = 0x0D, 1530 MemoryType3Dram = 0x0E, 1531 MemoryTypeSdram = 0x0F, 1532 MemoryTypeSgram = 0x10, 1533 MemoryTypeRdram = 0x11, 1534 MemoryTypeDdr = 0x12, 1535 MemoryTypeDdr2 = 0x13, 1536 MemoryTypeDdr2FbDimm = 0x14, 1537 MemoryTypeDdr3 = 0x18, 1538 MemoryTypeFbd2 = 0x19, 1539 MemoryTypeDdr4 = 0x1A, 1540 MemoryTypeLpddr = 0x1B, 1541 MemoryTypeLpddr2 = 0x1C, 1542 MemoryTypeLpddr3 = 0x1D, 1543 MemoryTypeLpddr4 = 0x1E 1544 } MEMORY_DEVICE_TYPE; 1545 1546 typedef struct { 1547 UINT16 Reserved :1; 1548 UINT16 Other :1; 1549 UINT16 Unknown :1; 1550 UINT16 FastPaged :1; 1551 UINT16 StaticColumn :1; 1552 UINT16 PseudoStatic :1; 1553 UINT16 Rambus :1; 1554 UINT16 Synchronous :1; 1555 UINT16 Cmos :1; 1556 UINT16 Edo :1; 1557 UINT16 WindowDram :1; 1558 UINT16 CacheDram :1; 1559 UINT16 Nonvolatile :1; 1560 UINT16 Registered :1; 1561 UINT16 Unbuffered :1; 1562 UINT16 LrDimm :1; 1563 } MEMORY_DEVICE_TYPE_DETAIL; 1564 1565 /// 1566 /// Memory Device (Type 17). 1567 /// 1568 /// This structure describes a single memory device that is part of 1569 /// a larger Physical Memory Array (Type 16). 1570 /// Note: If a system includes memory-device sockets, the SMBIOS implementation 1571 /// includes a Memory Device structure instance for each slot, whether or not the 1572 /// socket is currently populated. 1573 /// 1574 typedef struct { 1575 SMBIOS_STRUCTURE Hdr; 1576 UINT16 MemoryArrayHandle; 1577 UINT16 MemoryErrorInformationHandle; 1578 UINT16 TotalWidth; 1579 UINT16 DataWidth; 1580 UINT16 Size; 1581 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. 1582 UINT8 DeviceSet; 1583 SMBIOS_TABLE_STRING DeviceLocator; 1584 SMBIOS_TABLE_STRING BankLocator; 1585 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. 1586 MEMORY_DEVICE_TYPE_DETAIL TypeDetail; 1587 UINT16 Speed; 1588 SMBIOS_TABLE_STRING Manufacturer; 1589 SMBIOS_TABLE_STRING SerialNumber; 1590 SMBIOS_TABLE_STRING AssetTag; 1591 SMBIOS_TABLE_STRING PartNumber; 1592 // 1593 // Add for smbios 2.6 1594 // 1595 UINT8 Attributes; 1596 // 1597 // Add for smbios 2.7 1598 // 1599 UINT32 ExtendedSize; 1600 UINT16 ConfiguredMemoryClockSpeed; 1601 // 1602 // Add for smbios 2.8.0 1603 // 1604 UINT16 MinimumVoltage; 1605 UINT16 MaximumVoltage; 1606 UINT16 ConfiguredVoltage; 1607 } SMBIOS_TABLE_TYPE17; 1608 1609 /// 1610 /// 32-bit Memory Error Information - Error Type. 1611 /// 1612 typedef enum { 1613 MemoryErrorOther = 0x01, 1614 MemoryErrorUnknown = 0x02, 1615 MemoryErrorOk = 0x03, 1616 MemoryErrorBadRead = 0x04, 1617 MemoryErrorParity = 0x05, 1618 MemoryErrorSigleBit = 0x06, 1619 MemoryErrorDoubleBit = 0x07, 1620 MemoryErrorMultiBit = 0x08, 1621 MemoryErrorNibble = 0x09, 1622 MemoryErrorChecksum = 0x0A, 1623 MemoryErrorCrc = 0x0B, 1624 MemoryErrorCorrectSingleBit = 0x0C, 1625 MemoryErrorCorrected = 0x0D, 1626 MemoryErrorUnCorrectable = 0x0E 1627 } MEMORY_ERROR_TYPE; 1628 1629 /// 1630 /// 32-bit Memory Error Information - Error Granularity. 1631 /// 1632 typedef enum { 1633 MemoryGranularityOther = 0x01, 1634 MemoryGranularityOtherUnknown = 0x02, 1635 MemoryGranularityDeviceLevel = 0x03, 1636 MemoryGranularityMemPartitionLevel = 0x04 1637 } MEMORY_ERROR_GRANULARITY; 1638 1639 /// 1640 /// 32-bit Memory Error Information - Error Operation. 1641 /// 1642 typedef enum { 1643 MemoryErrorOperationOther = 0x01, 1644 MemoryErrorOperationUnknown = 0x02, 1645 MemoryErrorOperationRead = 0x03, 1646 MemoryErrorOperationWrite = 0x04, 1647 MemoryErrorOperationPartialWrite = 0x05 1648 } MEMORY_ERROR_OPERATION; 1649 1650 /// 1651 /// 32-bit Memory Error Information (Type 18). 1652 /// 1653 /// This structure identifies the specifics of an error that might be detected 1654 /// within a Physical Memory Array. 1655 /// 1656 typedef struct { 1657 SMBIOS_STRUCTURE Hdr; 1658 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE. 1659 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY. 1660 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION. 1661 UINT32 VendorSyndrome; 1662 UINT32 MemoryArrayErrorAddress; 1663 UINT32 DeviceErrorAddress; 1664 UINT32 ErrorResolution; 1665 } SMBIOS_TABLE_TYPE18; 1666 1667 /// 1668 /// Memory Array Mapped Address (Type 19). 1669 /// 1670 /// This structure provides the address mapping for a Physical Memory Array. 1671 /// One structure is present for each contiguous address range described. 1672 /// 1673 typedef struct { 1674 SMBIOS_STRUCTURE Hdr; 1675 UINT32 StartingAddress; 1676 UINT32 EndingAddress; 1677 UINT16 MemoryArrayHandle; 1678 UINT8 PartitionWidth; 1679 // 1680 // Add for smbios 2.7 1681 // 1682 UINT64 ExtendedStartingAddress; 1683 UINT64 ExtendedEndingAddress; 1684 } SMBIOS_TABLE_TYPE19; 1685 1686 /// 1687 /// Memory Device Mapped Address (Type 20). 1688 /// 1689 /// This structure maps memory address space usually to a device-level granularity. 1690 /// One structure is present for each contiguous address range described. 1691 /// 1692 typedef struct { 1693 SMBIOS_STRUCTURE Hdr; 1694 UINT32 StartingAddress; 1695 UINT32 EndingAddress; 1696 UINT16 MemoryDeviceHandle; 1697 UINT16 MemoryArrayMappedAddressHandle; 1698 UINT8 PartitionRowPosition; 1699 UINT8 InterleavePosition; 1700 UINT8 InterleavedDataDepth; 1701 // 1702 // Add for smbios 2.7 1703 // 1704 UINT64 ExtendedStartingAddress; 1705 UINT64 ExtendedEndingAddress; 1706 } SMBIOS_TABLE_TYPE20; 1707 1708 /// 1709 /// Built-in Pointing Device - Type 1710 /// 1711 typedef enum { 1712 PointingDeviceTypeOther = 0x01, 1713 PointingDeviceTypeUnknown = 0x02, 1714 PointingDeviceTypeMouse = 0x03, 1715 PointingDeviceTypeTrackBall = 0x04, 1716 PointingDeviceTypeTrackPoint = 0x05, 1717 PointingDeviceTypeGlidePoint = 0x06, 1718 PointingDeviceTouchPad = 0x07, 1719 PointingDeviceTouchScreen = 0x08, 1720 PointingDeviceOpticalSensor = 0x09 1721 } BUILTIN_POINTING_DEVICE_TYPE; 1722 1723 /// 1724 /// Built-in Pointing Device - Interface. 1725 /// 1726 typedef enum { 1727 PointingDeviceInterfaceOther = 0x01, 1728 PointingDeviceInterfaceUnknown = 0x02, 1729 PointingDeviceInterfaceSerial = 0x03, 1730 PointingDeviceInterfacePs2 = 0x04, 1731 PointingDeviceInterfaceInfrared = 0x05, 1732 PointingDeviceInterfaceHpHil = 0x06, 1733 PointingDeviceInterfaceBusMouse = 0x07, 1734 PointingDeviceInterfaceADB = 0x08, 1735 PointingDeviceInterfaceBusMouseDB9 = 0xA0, 1736 PointingDeviceInterfaceBusMouseMicroDin = 0xA1, 1737 PointingDeviceInterfaceUsb = 0xA2 1738 } BUILTIN_POINTING_DEVICE_INTERFACE; 1739 1740 /// 1741 /// Built-in Pointing Device (Type 21). 1742 /// 1743 /// This structure describes the attributes of the built-in pointing device for the 1744 /// system. The presence of this structure does not imply that the built-in 1745 /// pointing device is active for the system's use! 1746 /// 1747 typedef struct { 1748 SMBIOS_STRUCTURE Hdr; 1749 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE. 1750 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE. 1751 UINT8 NumberOfButtons; 1752 } SMBIOS_TABLE_TYPE21; 1753 1754 /// 1755 /// Portable Battery - Device Chemistry 1756 /// 1757 typedef enum { 1758 PortableBatteryDeviceChemistryOther = 0x01, 1759 PortableBatteryDeviceChemistryUnknown = 0x02, 1760 PortableBatteryDeviceChemistryLeadAcid = 0x03, 1761 PortableBatteryDeviceChemistryNickelCadmium = 0x04, 1762 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05, 1763 PortableBatteryDeviceChemistryLithiumIon = 0x06, 1764 PortableBatteryDeviceChemistryZincAir = 0x07, 1765 PortableBatteryDeviceChemistryLithiumPolymer = 0x08 1766 } PORTABLE_BATTERY_DEVICE_CHEMISTRY; 1767 1768 /// 1769 /// Portable Battery (Type 22). 1770 /// 1771 /// This structure describes the attributes of the portable battery(s) for the system. 1772 /// The structure contains the static attributes for the group. Each structure describes 1773 /// a single battery pack's attributes. 1774 /// 1775 typedef struct { 1776 SMBIOS_STRUCTURE Hdr; 1777 SMBIOS_TABLE_STRING Location; 1778 SMBIOS_TABLE_STRING Manufacturer; 1779 SMBIOS_TABLE_STRING ManufactureDate; 1780 SMBIOS_TABLE_STRING SerialNumber; 1781 SMBIOS_TABLE_STRING DeviceName; 1782 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY. 1783 UINT16 DeviceCapacity; 1784 UINT16 DesignVoltage; 1785 SMBIOS_TABLE_STRING SBDSVersionNumber; 1786 UINT8 MaximumErrorInBatteryData; 1787 UINT16 SBDSSerialNumber; 1788 UINT16 SBDSManufactureDate; 1789 SMBIOS_TABLE_STRING SBDSDeviceChemistry; 1790 UINT8 DesignCapacityMultiplier; 1791 UINT32 OEMSpecific; 1792 } SMBIOS_TABLE_TYPE22; 1793 1794 /// 1795 /// System Reset (Type 23) 1796 /// 1797 /// This structure describes whether Automatic System Reset functions enabled (Status). 1798 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset) 1799 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot 1800 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time 1801 /// the system will re-boot according to the Boot Option at Limit. 1802 /// 1803 typedef struct { 1804 SMBIOS_STRUCTURE Hdr; 1805 UINT8 Capabilities; 1806 UINT16 ResetCount; 1807 UINT16 ResetLimit; 1808 UINT16 TimerInterval; 1809 UINT16 Timeout; 1810 } SMBIOS_TABLE_TYPE23; 1811 1812 /// 1813 /// Hardware Security (Type 24). 1814 /// 1815 /// This structure describes the system-wide hardware security settings. 1816 /// 1817 typedef struct { 1818 SMBIOS_STRUCTURE Hdr; 1819 UINT8 HardwareSecuritySettings; 1820 } SMBIOS_TABLE_TYPE24; 1821 1822 /// 1823 /// System Power Controls (Type 25). 1824 /// 1825 /// This structure describes the attributes for controlling the main power supply to the system. 1826 /// Software that interprets this structure uses the month, day, hour, minute, and second values 1827 /// to determine the number of seconds until the next power-on of the system. The presence of 1828 /// this structure implies that a timed power-on facility is available for the system. 1829 /// 1830 typedef struct { 1831 SMBIOS_STRUCTURE Hdr; 1832 UINT8 NextScheduledPowerOnMonth; 1833 UINT8 NextScheduledPowerOnDayOfMonth; 1834 UINT8 NextScheduledPowerOnHour; 1835 UINT8 NextScheduledPowerOnMinute; 1836 UINT8 NextScheduledPowerOnSecond; 1837 } SMBIOS_TABLE_TYPE25; 1838 1839 /// 1840 /// Voltage Probe - Location and Status. 1841 /// 1842 typedef struct { 1843 UINT8 VoltageProbeSite :5; 1844 UINT8 VoltageProbeStatus :3; 1845 } MISC_VOLTAGE_PROBE_LOCATION; 1846 1847 /// 1848 /// Voltage Probe (Type 26) 1849 /// 1850 /// This describes the attributes for a voltage probe in the system. 1851 /// Each structure describes a single voltage probe. 1852 /// 1853 typedef struct { 1854 SMBIOS_STRUCTURE Hdr; 1855 SMBIOS_TABLE_STRING Description; 1856 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus; 1857 UINT16 MaximumValue; 1858 UINT16 MinimumValue; 1859 UINT16 Resolution; 1860 UINT16 Tolerance; 1861 UINT16 Accuracy; 1862 UINT32 OEMDefined; 1863 UINT16 NominalValue; 1864 } SMBIOS_TABLE_TYPE26; 1865 1866 /// 1867 /// Cooling Device - Device Type and Status. 1868 /// 1869 typedef struct { 1870 UINT8 CoolingDevice :5; 1871 UINT8 CoolingDeviceStatus :3; 1872 } MISC_COOLING_DEVICE_TYPE; 1873 1874 /// 1875 /// Cooling Device (Type 27) 1876 /// 1877 /// This structure describes the attributes for a cooling device in the system. 1878 /// Each structure describes a single cooling device. 1879 /// 1880 typedef struct { 1881 SMBIOS_STRUCTURE Hdr; 1882 UINT16 TemperatureProbeHandle; 1883 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus; 1884 UINT8 CoolingUnitGroup; 1885 UINT32 OEMDefined; 1886 UINT16 NominalSpeed; 1887 // 1888 // Add for smbios 2.7 1889 // 1890 SMBIOS_TABLE_STRING Description; 1891 } SMBIOS_TABLE_TYPE27; 1892 1893 /// 1894 /// Temperature Probe - Location and Status. 1895 /// 1896 typedef struct { 1897 UINT8 TemperatureProbeSite :5; 1898 UINT8 TemperatureProbeStatus :3; 1899 } MISC_TEMPERATURE_PROBE_LOCATION; 1900 1901 /// 1902 /// Temperature Probe (Type 28). 1903 /// 1904 /// This structure describes the attributes for a temperature probe in the system. 1905 /// Each structure describes a single temperature probe. 1906 /// 1907 typedef struct { 1908 SMBIOS_STRUCTURE Hdr; 1909 SMBIOS_TABLE_STRING Description; 1910 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus; 1911 UINT16 MaximumValue; 1912 UINT16 MinimumValue; 1913 UINT16 Resolution; 1914 UINT16 Tolerance; 1915 UINT16 Accuracy; 1916 UINT32 OEMDefined; 1917 UINT16 NominalValue; 1918 } SMBIOS_TABLE_TYPE28; 1919 1920 /// 1921 /// Electrical Current Probe - Location and Status. 1922 /// 1923 typedef struct { 1924 UINT8 ElectricalCurrentProbeSite :5; 1925 UINT8 ElectricalCurrentProbeStatus :3; 1926 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION; 1927 1928 /// 1929 /// Electrical Current Probe (Type 29). 1930 /// 1931 /// This structure describes the attributes for an electrical current probe in the system. 1932 /// Each structure describes a single electrical current probe. 1933 /// 1934 typedef struct { 1935 SMBIOS_STRUCTURE Hdr; 1936 SMBIOS_TABLE_STRING Description; 1937 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus; 1938 UINT16 MaximumValue; 1939 UINT16 MinimumValue; 1940 UINT16 Resolution; 1941 UINT16 Tolerance; 1942 UINT16 Accuracy; 1943 UINT32 OEMDefined; 1944 UINT16 NominalValue; 1945 } SMBIOS_TABLE_TYPE29; 1946 1947 /// 1948 /// Out-of-Band Remote Access (Type 30). 1949 /// 1950 /// This structure describes the attributes and policy settings of a hardware facility 1951 /// that may be used to gain remote access to a hardware system when the operating system 1952 /// is not available due to power-down status, hardware failures, or boot failures. 1953 /// 1954 typedef struct { 1955 SMBIOS_STRUCTURE Hdr; 1956 SMBIOS_TABLE_STRING ManufacturerName; 1957 UINT8 Connections; 1958 } SMBIOS_TABLE_TYPE30; 1959 1960 /// 1961 /// Boot Integrity Services (BIS) Entry Point (Type 31). 1962 /// 1963 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). 1964 /// 1965 typedef struct { 1966 SMBIOS_STRUCTURE Hdr; 1967 UINT8 Checksum; 1968 UINT8 Reserved1; 1969 UINT16 Reserved2; 1970 UINT32 BisEntry16; 1971 UINT32 BisEntry32; 1972 UINT64 Reserved3; 1973 UINT32 Reserved4; 1974 } SMBIOS_TABLE_TYPE31; 1975 1976 /// 1977 /// System Boot Information - System Boot Status. 1978 /// 1979 typedef enum { 1980 BootInformationStatusNoError = 0x00, 1981 BootInformationStatusNoBootableMedia = 0x01, 1982 BootInformationStatusNormalOSFailedLoading = 0x02, 1983 BootInformationStatusFirmwareDetectedFailure = 0x03, 1984 BootInformationStatusOSDetectedFailure = 0x04, 1985 BootInformationStatusUserRequestedBoot = 0x05, 1986 BootInformationStatusSystemSecurityViolation = 0x06, 1987 BootInformationStatusPreviousRequestedImage = 0x07, 1988 BootInformationStatusWatchdogTimerExpired = 0x08, 1989 BootInformationStatusStartReserved = 0x09, 1990 BootInformationStatusStartOemSpecific = 0x80, 1991 BootInformationStatusStartProductSpecific = 0xC0 1992 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE; 1993 1994 /// 1995 /// System Boot Information (Type 32). 1996 /// 1997 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the 1998 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management 1999 /// application via this structure. When used in the PXE environment, for example, 2000 /// this code identifies the reason the PXE was initiated and can be used by boot-image 2001 /// software to further automate an enterprise's PXE sessions. For example, an enterprise 2002 /// could choose to automatically download a hardware-diagnostic image to a client whose 2003 /// reason code indicated either a firmware- or operating system-detected hardware failure. 2004 /// 2005 typedef struct { 2006 SMBIOS_STRUCTURE Hdr; 2007 UINT8 Reserved[6]; 2008 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE. 2009 } SMBIOS_TABLE_TYPE32; 2010 2011 /// 2012 /// 64-bit Memory Error Information (Type 33). 2013 /// 2014 /// This structure describes an error within a Physical Memory Array, 2015 /// when the error address is above 4G (0xFFFFFFFF). 2016 /// 2017 typedef struct { 2018 SMBIOS_STRUCTURE Hdr; 2019 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE. 2020 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY. 2021 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION. 2022 UINT32 VendorSyndrome; 2023 UINT64 MemoryArrayErrorAddress; 2024 UINT64 DeviceErrorAddress; 2025 UINT32 ErrorResolution; 2026 } SMBIOS_TABLE_TYPE33; 2027 2028 /// 2029 /// Management Device - Type. 2030 /// 2031 typedef enum { 2032 ManagementDeviceTypeOther = 0x01, 2033 ManagementDeviceTypeUnknown = 0x02, 2034 ManagementDeviceTypeLm75 = 0x03, 2035 ManagementDeviceTypeLm78 = 0x04, 2036 ManagementDeviceTypeLm79 = 0x05, 2037 ManagementDeviceTypeLm80 = 0x06, 2038 ManagementDeviceTypeLm81 = 0x07, 2039 ManagementDeviceTypeAdm9240 = 0x08, 2040 ManagementDeviceTypeDs1780 = 0x09, 2041 ManagementDeviceTypeMaxim1617 = 0x0A, 2042 ManagementDeviceTypeGl518Sm = 0x0B, 2043 ManagementDeviceTypeW83781D = 0x0C, 2044 ManagementDeviceTypeHt82H791 = 0x0D 2045 } MISC_MANAGEMENT_DEVICE_TYPE; 2046 2047 /// 2048 /// Management Device - Address Type. 2049 /// 2050 typedef enum { 2051 ManagementDeviceAddressTypeOther = 0x01, 2052 ManagementDeviceAddressTypeUnknown = 0x02, 2053 ManagementDeviceAddressTypeIOPort = 0x03, 2054 ManagementDeviceAddressTypeMemory = 0x04, 2055 ManagementDeviceAddressTypeSmbus = 0x05 2056 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE; 2057 2058 /// 2059 /// Management Device (Type 34). 2060 /// 2061 /// The information in this structure defines the attributes of a Management Device. 2062 /// A Management Device might control one or more fans or voltage, current, or temperature 2063 /// probes as defined by one or more Management Device Component structures. 2064 /// 2065 typedef struct { 2066 SMBIOS_STRUCTURE Hdr; 2067 SMBIOS_TABLE_STRING Description; 2068 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE. 2069 UINT32 Address; 2070 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE. 2071 } SMBIOS_TABLE_TYPE34; 2072 2073 /// 2074 /// Management Device Component (Type 35) 2075 /// 2076 /// This structure associates a cooling device or environmental probe with structures 2077 /// that define the controlling hardware device and (optionally) the component's thresholds. 2078 /// 2079 typedef struct { 2080 SMBIOS_STRUCTURE Hdr; 2081 SMBIOS_TABLE_STRING Description; 2082 UINT16 ManagementDeviceHandle; 2083 UINT16 ComponentHandle; 2084 UINT16 ThresholdHandle; 2085 } SMBIOS_TABLE_TYPE35; 2086 2087 /// 2088 /// Management Device Threshold Data (Type 36). 2089 /// 2090 /// The information in this structure defines threshold information for 2091 /// a component (probe or cooling-unit) contained within a Management Device. 2092 /// 2093 typedef struct { 2094 SMBIOS_STRUCTURE Hdr; 2095 UINT16 LowerThresholdNonCritical; 2096 UINT16 UpperThresholdNonCritical; 2097 UINT16 LowerThresholdCritical; 2098 UINT16 UpperThresholdCritical; 2099 UINT16 LowerThresholdNonRecoverable; 2100 UINT16 UpperThresholdNonRecoverable; 2101 } SMBIOS_TABLE_TYPE36; 2102 2103 /// 2104 /// Memory Channel Entry. 2105 /// 2106 typedef struct { 2107 UINT8 DeviceLoad; 2108 UINT16 DeviceHandle; 2109 } MEMORY_DEVICE; 2110 2111 /// 2112 /// Memory Channel - Channel Type. 2113 /// 2114 typedef enum { 2115 MemoryChannelTypeOther = 0x01, 2116 MemoryChannelTypeUnknown = 0x02, 2117 MemoryChannelTypeRambus = 0x03, 2118 MemoryChannelTypeSyncLink = 0x04 2119 } MEMORY_CHANNEL_TYPE; 2120 2121 /// 2122 /// Memory Channel (Type 37) 2123 /// 2124 /// The information in this structure provides the correlation between a Memory Channel 2125 /// and its associated Memory Devices. Each device presents one or more loads to the channel. 2126 /// The sum of all device loads cannot exceed the channel's defined maximum. 2127 /// 2128 typedef struct { 2129 SMBIOS_STRUCTURE Hdr; 2130 UINT8 ChannelType; 2131 UINT8 MaximumChannelLoad; 2132 UINT8 MemoryDeviceCount; 2133 MEMORY_DEVICE MemoryDevice[1]; 2134 } SMBIOS_TABLE_TYPE37; 2135 2136 /// 2137 /// IPMI Device Information - BMC Interface Type 2138 /// 2139 typedef enum { 2140 IPMIDeviceInfoInterfaceTypeUnknown = 0x00, 2141 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style. 2142 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip. 2143 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer 2144 IPMIDeviceInfoInterfaceTypeReserved = 0x04 2145 } BMC_INTERFACE_TYPE; 2146 2147 /// 2148 /// IPMI Device Information (Type 38). 2149 /// 2150 /// The information in this structure defines the attributes of an 2151 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC). 2152 /// 2153 /// The Type 42 structure can also be used to describe a physical management controller 2154 /// host interface and one or more protocols that share that interface. If IPMI is not 2155 /// shared with other protocols, either the Type 38 or Type 42 structures can be used. 2156 /// Providing Type 38 is recommended for backward compatibility. 2157 /// 2158 typedef struct { 2159 SMBIOS_STRUCTURE Hdr; 2160 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE. 2161 UINT8 IPMISpecificationRevision; 2162 UINT8 I2CSlaveAddress; 2163 UINT8 NVStorageDeviceAddress; 2164 UINT64 BaseAddress; 2165 UINT8 BaseAddressModifier_InterruptInfo; 2166 UINT8 InterruptNumber; 2167 } SMBIOS_TABLE_TYPE38; 2168 2169 /// 2170 /// System Power Supply - Power Supply Characteristics. 2171 /// 2172 typedef struct { 2173 UINT16 PowerSupplyHotReplaceable:1; 2174 UINT16 PowerSupplyPresent :1; 2175 UINT16 PowerSupplyUnplugged :1; 2176 UINT16 InputVoltageRangeSwitch :4; 2177 UINT16 PowerSupplyStatus :3; 2178 UINT16 PowerSupplyType :4; 2179 UINT16 Reserved :2; 2180 } SYS_POWER_SUPPLY_CHARACTERISTICS; 2181 2182 /// 2183 /// System Power Supply (Type 39). 2184 /// 2185 /// This structure identifies attributes of a system power supply. One instance 2186 /// of this record is present for each possible power supply in a system. 2187 /// 2188 typedef struct { 2189 SMBIOS_STRUCTURE Hdr; 2190 UINT8 PowerUnitGroup; 2191 SMBIOS_TABLE_STRING Location; 2192 SMBIOS_TABLE_STRING DeviceName; 2193 SMBIOS_TABLE_STRING Manufacturer; 2194 SMBIOS_TABLE_STRING SerialNumber; 2195 SMBIOS_TABLE_STRING AssetTagNumber; 2196 SMBIOS_TABLE_STRING ModelPartNumber; 2197 SMBIOS_TABLE_STRING RevisionLevel; 2198 UINT16 MaxPowerCapacity; 2199 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics; 2200 UINT16 InputVoltageProbeHandle; 2201 UINT16 CoolingDeviceHandle; 2202 UINT16 InputCurrentProbeHandle; 2203 } SMBIOS_TABLE_TYPE39; 2204 2205 /// 2206 /// Additional Information Entry Format. 2207 /// 2208 typedef struct { 2209 UINT8 EntryLength; 2210 UINT16 ReferencedHandle; 2211 UINT8 ReferencedOffset; 2212 SMBIOS_TABLE_STRING EntryString; 2213 UINT8 Value[1]; 2214 }ADDITIONAL_INFORMATION_ENTRY; 2215 2216 /// 2217 /// Additional Information (Type 40). 2218 /// 2219 /// This structure is intended to provide additional information for handling unspecified 2220 /// enumerated values and interim field updates in another structure. 2221 /// 2222 typedef struct { 2223 SMBIOS_STRUCTURE Hdr; 2224 UINT8 NumberOfAdditionalInformationEntries; 2225 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; 2226 } SMBIOS_TABLE_TYPE40; 2227 2228 /// 2229 /// Onboard Devices Extended Information - Onboard Device Types. 2230 /// 2231 typedef enum{ 2232 OnBoardDeviceExtendedTypeOther = 0x01, 2233 OnBoardDeviceExtendedTypeUnknown = 0x02, 2234 OnBoardDeviceExtendedTypeVideo = 0x03, 2235 OnBoardDeviceExtendedTypeScsiController = 0x04, 2236 OnBoardDeviceExtendedTypeEthernet = 0x05, 2237 OnBoardDeviceExtendedTypeTokenRing = 0x06, 2238 OnBoardDeviceExtendedTypeSound = 0x07, 2239 OnBoardDeviceExtendedTypePATAController = 0x08, 2240 OnBoardDeviceExtendedTypeSATAController = 0x09, 2241 OnBoardDeviceExtendedTypeSASController = 0x0A 2242 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE; 2243 2244 /// 2245 /// Onboard Devices Extended Information (Type 41). 2246 /// 2247 /// The information in this structure defines the attributes of devices that 2248 /// are onboard (soldered onto) a system element, usually the baseboard. 2249 /// In general, an entry in this table implies that the BIOS has some level of 2250 /// control over the enabling of the associated device for use by the system. 2251 /// 2252 typedef struct { 2253 SMBIOS_STRUCTURE Hdr; 2254 SMBIOS_TABLE_STRING ReferenceDesignation; 2255 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE 2256 UINT8 DeviceTypeInstance; 2257 UINT16 SegmentGroupNum; 2258 UINT8 BusNum; 2259 UINT8 DevFuncNum; 2260 } SMBIOS_TABLE_TYPE41; 2261 2262 /// 2263 /// Management Controller Host Interface (Type 42). 2264 /// 2265 /// The information in this structure defines the attributes of a Management 2266 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms. 2267 /// 2268 /// Type 42 should be used for management controller host interfaces that use protocols 2269 /// other than IPMI or that use multiple protocols on a single host interface type. 2270 /// 2271 /// This structure should also be provided if IPMI is shared with other protocols 2272 /// over the same interface hardware. If IPMI is not shared with other protocols, 2273 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is 2274 /// recommended for backward compatibility. The structures are not required to 2275 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented 2276 /// simultaneously to provide backward compatibility with IPMI applications or drivers 2277 /// that do not yet recognize the Type 42 structure. 2278 /// 2279 typedef struct { 2280 SMBIOS_STRUCTURE Hdr; 2281 UINT8 InterfaceType; 2282 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes 2283 } SMBIOS_TABLE_TYPE42; 2284 2285 /// 2286 /// Inactive (Type 126) 2287 /// 2288 typedef struct { 2289 SMBIOS_STRUCTURE Hdr; 2290 } SMBIOS_TABLE_TYPE126; 2291 2292 /// 2293 /// End-of-Table (Type 127) 2294 /// 2295 typedef struct { 2296 SMBIOS_STRUCTURE Hdr; 2297 } SMBIOS_TABLE_TYPE127; 2298 2299 /// 2300 /// Union of all the possible SMBIOS record types. 2301 /// 2302 typedef union { 2303 SMBIOS_STRUCTURE *Hdr; 2304 SMBIOS_TABLE_TYPE0 *Type0; 2305 SMBIOS_TABLE_TYPE1 *Type1; 2306 SMBIOS_TABLE_TYPE2 *Type2; 2307 SMBIOS_TABLE_TYPE3 *Type3; 2308 SMBIOS_TABLE_TYPE4 *Type4; 2309 SMBIOS_TABLE_TYPE5 *Type5; 2310 SMBIOS_TABLE_TYPE6 *Type6; 2311 SMBIOS_TABLE_TYPE7 *Type7; 2312 SMBIOS_TABLE_TYPE8 *Type8; 2313 SMBIOS_TABLE_TYPE9 *Type9; 2314 SMBIOS_TABLE_TYPE10 *Type10; 2315 SMBIOS_TABLE_TYPE11 *Type11; 2316 SMBIOS_TABLE_TYPE12 *Type12; 2317 SMBIOS_TABLE_TYPE13 *Type13; 2318 SMBIOS_TABLE_TYPE14 *Type14; 2319 SMBIOS_TABLE_TYPE15 *Type15; 2320 SMBIOS_TABLE_TYPE16 *Type16; 2321 SMBIOS_TABLE_TYPE17 *Type17; 2322 SMBIOS_TABLE_TYPE18 *Type18; 2323 SMBIOS_TABLE_TYPE19 *Type19; 2324 SMBIOS_TABLE_TYPE20 *Type20; 2325 SMBIOS_TABLE_TYPE21 *Type21; 2326 SMBIOS_TABLE_TYPE22 *Type22; 2327 SMBIOS_TABLE_TYPE23 *Type23; 2328 SMBIOS_TABLE_TYPE24 *Type24; 2329 SMBIOS_TABLE_TYPE25 *Type25; 2330 SMBIOS_TABLE_TYPE26 *Type26; 2331 SMBIOS_TABLE_TYPE27 *Type27; 2332 SMBIOS_TABLE_TYPE28 *Type28; 2333 SMBIOS_TABLE_TYPE29 *Type29; 2334 SMBIOS_TABLE_TYPE30 *Type30; 2335 SMBIOS_TABLE_TYPE31 *Type31; 2336 SMBIOS_TABLE_TYPE32 *Type32; 2337 SMBIOS_TABLE_TYPE33 *Type33; 2338 SMBIOS_TABLE_TYPE34 *Type34; 2339 SMBIOS_TABLE_TYPE35 *Type35; 2340 SMBIOS_TABLE_TYPE36 *Type36; 2341 SMBIOS_TABLE_TYPE37 *Type37; 2342 SMBIOS_TABLE_TYPE38 *Type38; 2343 SMBIOS_TABLE_TYPE39 *Type39; 2344 SMBIOS_TABLE_TYPE40 *Type40; 2345 SMBIOS_TABLE_TYPE41 *Type41; 2346 SMBIOS_TABLE_TYPE42 *Type42; 2347 SMBIOS_TABLE_TYPE126 *Type126; 2348 SMBIOS_TABLE_TYPE127 *Type127; 2349 UINT8 *Raw; 2350 } SMBIOS_STRUCTURE_POINTER; 2351 2352 #pragma pack() 2353 2354 #endif 2355
