/external/valgrind/tests/ |
mips_features.c | 22 /* Simple detection of MIPS DSP ASE at runtime for Linux. 60 else if (strcmp(feature, "mips32-dsp") == 0) { 61 const char *dsp = "dsp"; local 62 cpuinfo = mipsCPUInfo(dsp);
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/external/libchrome/sandbox/linux/system_headers/ |
mips_linux_ucontext.h | 29 uint32_t dsp; member in struct:__anon22828
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/external/skia/src/views/unix/ |
SkOSWindow_Unix.cpp | 79 Display* dsp = fUnixWindow.fDisplay; local 80 if (nullptr == dsp) { 103 fVi = glXChooseVisual(dsp, DefaultScreen(dsp), msaaAtt); 107 fVi = glXChooseVisual(dsp, DefaultScreen(dsp), att); 113 glXGetConfig(dsp, fVi, GLX_SAMPLES_ARB, &info->fSampleCount); 114 glXGetConfig(dsp, fVi, GLX_STENCIL_SIZE, &info->fStencilBits); 116 Colormap colorMap = XCreateColormap(dsp, 117 RootWindow(dsp, fVi->screen) 206 Display* dsp = fUnixWindow.fDisplay; local 265 Display* dsp = fUnixWindow.fDisplay; local 313 Display* dsp = fUnixWindow.fDisplay; local 460 Display* dsp = fUnixWindow.fDisplay; local 492 Display* dsp = fUnixWindow.fDisplay; local [all...] |
/prebuilts/ndk/r10/platforms/android-12/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-13/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-14/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-15/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-16/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-17/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-18/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-19/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r10/platforms/android-9/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-12/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-13/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-14/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-15/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-16/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-17/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-18/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-19/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/prebuilts/ndk/r11/platforms/android-9/arch-mips/usr/include/asm/ |
processor.h | 66 struct mips_dsp_state dsp; member in struct:thread_struct 79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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/system/core/storaged/tests/ |
storaged_test.cpp | 340 disk_stats_publisher dsp; local 345 dsp.update(); 346 expect_increasing(prev, dsp.mPrevious); 347 prev = dsp.mPrevious;
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/external/libvorbis/lib/ |
smallft.c | 279 float dcp,arg,dsp,ar1h,ar2h; local 284 dsp=sin(arg); 416 ar1h=dcp*ar1-dsp*ai1; 417 ai1=dcp*ai1+dsp*ar1; 847 float dcp,arg,dsp,ar1h,ar2h; local 854 dsp=sin(arg); 988 ar1h=dcp*ar1-dsp*ai1; 989 ai1=dcp*ai1+dsp*ar1;
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/external/speex/libspeex/ |
smallft.c | 281 float dcp,arg,dsp,ar1h,ar2h; local 286 dsp=sin(arg); 418 ar1h=dcp*ar1-dsp*ai1; 419 ai1=dcp*ai1+dsp*ar1; 849 float dcp,arg,dsp,ar1h,ar2h; local 856 dsp=sin(arg); 990 ar1h=dcp*ar1-dsp*ai1; 991 ai1=dcp*ai1+dsp*ar1;
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