1 /* 2 3 Copyright (c) 2009, 2010, 2011, 2013 STMicroelectronics 4 Written by Christophe Lyon 5 6 Permission is hereby granted, free of charge, to any person obtaining a copy 7 of this software and associated documentation files (the "Software"), to deal 8 in the Software without restriction, including without limitation the rights 9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 copies of the Software, and to permit persons to whom the Software is 11 furnished to do so, subject to the following conditions: 12 13 The above copyright notice and this permission notice shall be included in 14 all copies or substantial portions of the Software. 15 16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 THE SOFTWARE. 23 24 */ 25 26 #if defined(__arm__) || defined(__aarch64__) 27 #include <arm_neon.h> 28 #else 29 #include "stm-arm-neon.h" 30 #endif 31 32 #include "stm-arm-neon-ref.h" 33 #include <math.h> 34 35 #define TEST_MSG "VCVT/VCVTQ" 36 void exec_vcvt (void) 37 { 38 int i; 39 40 /* Basic test: y=vcvt(x), then store the result. */ 41 #define TEST_VCVT(Q, T1, T2, W, N, TS1, TS2) \ 42 VECT_VAR(vector_res, T1, W, N) = \ 43 vcvt##Q##_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N)); \ 44 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ 45 VECT_VAR(vector_res, T1, W, N)); \ 46 DUMP(TEST_MSG, T1, W, N, PRIx##W); 47 48 #define TEST_VCVT_FP(Q, T1, T2, W, N, TS1, TS2) \ 49 VECT_VAR(vector_res, T1, W, N) = \ 50 vcvt##Q##_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N)); \ 51 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ 52 VECT_VAR(vector_res, T1, W, N)); \ 53 DUMP_FP(TEST_MSG, T1, W, N, PRIx##W); 54 55 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 56 #define TEST_VCVT_FP16(T1, T2, W1, W2, N) \ 57 VECT_VAR(vector_res, T1, W1, N) = \ 58 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ 59 vst1q_##T2##W1(VECT_VAR(result, T1, W1, N), \ 60 VECT_VAR(vector_res, T1, W1, N)); \ 61 DUMP_FP(TEST_MSG, T1, W1, N, PRIx##W1); 62 63 #define TEST_VCVT_2FP16(T1, T2, W1, W2, N) \ 64 VECT_VAR(vector_res, T1, W1, N) = \ 65 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ 66 vst1_##T2##W1(VECT_VAR(result, T1, W1, N), \ 67 VECT_VAR(vector_res, T1, W1, N)); \ 68 DUMP_FP16(TEST_MSG, T1, W1, N, PRIx##W1); 69 #endif 70 71 #define TEST_VCVT_N(Q, T1, T2, W, N, TS1, TS2, V) \ 72 VECT_VAR(vector_res, T1, W, N) = \ 73 vcvt##Q##_n_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N), V); \ 74 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ 75 VECT_VAR(vector_res, T1, W, N)); \ 76 DUMP(TEST_MSG, T1, W, N, PRIx##W); 77 78 #define TEST_VCVT_N_FP(Q, T1, T2, W, N, TS1, TS2, V) \ 79 VECT_VAR(vector_res, T1, W, N) = \ 80 vcvt##Q##_n_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N), V); \ 81 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ 82 VECT_VAR(vector_res, T1, W, N)); \ 83 DUMP_FP(TEST_MSG, T1, W, N, PRIx##W); 84 85 /* With ARM RVCT, we need to declare variables before any executable 86 statement */ 87 DECL_VARIABLE_ALL_VARIANTS(vector); 88 DECL_VARIABLE_ALL_VARIANTS(vector_res); 89 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 90 DECL_VARIABLE(vector_init, uint, 16, 4); 91 DECL_VARIABLE(vector_init, uint, 16, 8); 92 DECL_VARIABLE(vector, float, 16, 4); 93 DECL_VARIABLE(vector, float, 16, 8); 94 DECL_VARIABLE(vector_res, float, 16, 4); 95 DECL_VARIABLE(vector_res, float, 16, 8); 96 #endif 97 98 clean_results (); 99 100 101 /* Initialize input "vector" from "buffer" */ 102 TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer); 103 VLOAD(vector, buffer, , float, f, 32, 2); 104 VLOAD(vector, buffer, q, float, f, 32, 4); 105 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 106 VLOAD(vector, buffer, , float, f, 16, 4); 107 VLOAD(vector, buffer, q, float, f, 16, 8); 108 #endif 109 110 /* Make sure some elements have a fractional part, to exercise 111 integer conversions */ 112 TEST_VSET_LANE(vector, , float, f, 32, 2, 0, -15.3f); 113 TEST_VSET_LANE(vector, , float, f, 32, 2, 1, 5.3f); 114 TEST_VSET_LANE(vector, q, float, f, 32, 4, 2, -15.3f); 115 TEST_VSET_LANE(vector, q, float, f, 32, 4, 3, 5.3f); 116 117 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 118 /* FP16 tests. */ 119 /* There is no vdup_n_f16, so we need another initialization 120 method. */ 121 /* Use all lanes with values of different types: first, a "standard" 122 positive number, a "standard" negative one, and +0 and -0. */ 123 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 0, 0x4b90 /* 15.125 */); 124 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 1, 0xcb90 /* -15.125 */); 125 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 2, 0 /* 0 */); 126 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 3, 0x8000 /* -0 */); 127 VECT_VAR(vector, float, 16, 4) = 128 vreinterpret_f16_u16(VECT_VAR(vector_init, uint, 16, 4)); 129 #endif 130 131 /* The same result buffers are used multiple times, so we output 132 them before overwriting them */ 133 fprintf(ref_file, "\n%s output:\n", TEST_MSG); 134 fprintf(gcc_tests_file, "\n%s output:\n", TEST_MSG); 135 136 /* vcvt_f32_xx */ 137 TEST_VCVT_FP(, float, f, 32, 2, int, s); 138 TEST_VCVT_FP(, float, f, 32, 2, uint, u); 139 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 140 TEST_VCVT_FP16(float, f, 32, 16, 4); 141 #endif 142 143 /* vcvtq_f32_xx */ 144 TEST_VCVT_FP(q, float, f, 32, 4, int, s); 145 TEST_VCVT_FP(q, float, f, 32, 4, uint, u); 146 147 /* vcvt_xx_f32 */ 148 TEST_VCVT(, int, s, 32, 2, float, f); 149 TEST_VCVT(, uint, u, 32, 2, float, f); 150 151 TEST_VSET_LANE(vector, q, float, f, 32, 4, 0, 0.0f); 152 TEST_VSET_LANE(vector, q, float, f, 32, 4, 1, -0.0f); 153 TEST_VSET_LANE(vector, q, float, f, 32, 4, 2, 15.12f); 154 TEST_VSET_LANE(vector, q, float, f, 32, 4, 3, -15.12f); 155 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 156 TEST_VCVT_2FP16(float, f, 16, 32, 4); 157 #endif 158 159 /* vcvtq_xx_f32 */ 160 TEST_VCVT(q, int, s, 32, 4, float, f); 161 TEST_VCVT(q, uint, u, 32, 4, float, f); 162 163 /* The same result buffers are used multiple times, so output them 164 before overwriting them */ 165 #undef TEST_MSG 166 #define TEST_MSG "VCVT_N/VCVTQ_N" 167 fprintf(ref_file, "\n%s output:\n", TEST_MSG); 168 fprintf(gcc_tests_file, "\n%s output:\n", TEST_MSG); 169 170 /* vcvt_n_f32_xx */ 171 TEST_VCVT_N_FP(, float, f, 32, 2, int, s, 2); 172 TEST_VCVT_N_FP(, float, f, 32, 2, uint, u, 7); 173 174 /* vcvtq_n_f32_xx */ 175 TEST_VCVT_N_FP(q, float, f, 32, 4, int, s, 30); 176 TEST_VCVT_N_FP(q, float, f, 32, 4, uint, u, 12); 177 178 /* vcvt_n_xx_f32 */ 179 TEST_VCVT_N(, int, s, 32, 2, float, f, 20); 180 TEST_VCVT_N(, uint, u, 32, 2, float, f, 2); 181 182 /* vcvtq_n_xx_f32 */ 183 TEST_VCVT_N(q, int, s, 32, 4, float, f, 13); 184 TEST_VCVT_N(q, uint, u, 32, 4, float, f, 1); 185 186 /* Check rounding */ 187 #undef TEST_MSG 188 #define TEST_MSG "VCVT/VCVTQ" 189 fprintf(ref_file, "\n%s output:\n", TEST_MSG " (check rounding)"); 190 VDUP(vector, , float, f, 32, 2, 10.4f); 191 VDUP(vector, q, float, f, 32, 4, 125.9f); 192 /* vcvt_xx_f32 */ 193 TEST_VCVT(, int, s, 32, 2, float, f); 194 TEST_VCVT(, uint, u, 32, 2, float, f); 195 /* vcvtq_xx_f32 */ 196 TEST_VCVT(q, int, s, 32, 4, float, f); 197 TEST_VCVT(q, uint, u, 32, 4, float, f); 198 199 #undef TEST_MSG 200 #define TEST_MSG "VCVT_N/VCVTQ_N" 201 fprintf(ref_file, "\n%s output:\n", TEST_MSG " (check rounding)"); 202 /* vcvt_n_xx_f32 */ 203 TEST_VCVT_N(, int, s, 32, 2, float, f, 20); 204 TEST_VCVT_N(, uint, u, 32, 2, float, f, 20); 205 /* vcvtq_n_xx_f32 */ 206 TEST_VCVT_N(q, int, s, 32, 4, float, f, 13); 207 TEST_VCVT_N(q, uint, u, 32, 4, float, f, 13); 208 209 #undef TEST_MSG 210 #define TEST_MSG "VCVT_N/VCVTQ_N" 211 fprintf(ref_file, "\n%s output:\n", TEST_MSG " (check saturation)"); 212 /* vcvt_n_xx_f32 */ 213 TEST_VCVT_N(, int, s, 32, 2, float, f, 31); 214 /* vcvtq_n_xx_f32 */ 215 TEST_VCVT_N(q, int, s, 32, 4, float, f, 31); 216 217 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) ) 218 #undef TEST_MSG 219 #define TEST_MSG "VCVT FP16" 220 fprintf(ref_file, "\n%s output:\n", TEST_MSG " (check fp16-fp32 inf/nan/denormal)"); 221 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 0, 0x0390 /* DENORMAL */); 222 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 1, 0x7c00 /* inf */); 223 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 2, 0x7e00 /* nan */); 224 TEST_VSET_LANE(vector_init, , uint, u, 16, 4, 3, 0xfc00 /* -inf */); 225 VECT_VAR(vector, float, 16, 4) = 226 vreinterpret_f16_u16(VECT_VAR(vector_init, uint, 16, 4)); 227 TEST_VCVT_FP16(float, f, 32, 16, 4); 228 229 fprintf(ref_file, "\n%s output:\n", TEST_MSG " (check fp32-fp16 inf/nan)"); 230 TEST_VSET_LANE(vector, q, float, f, 32, 4, 0, NAN); 231 TEST_VSET_LANE(vector, q, float, f, 32, 4, 1, HUGE_VALF); 232 TEST_VSET_LANE(vector, q, float, f, 32, 4, 2, -HUGE_VALF); 233 TEST_VSET_LANE(vector, q, float, f, 32, 4, 3, -0.0f); 234 TEST_VCVT_2FP16(float, f, 16, 32, 4); 235 #endif 236 } 237
