1 // Copyright (c) 2015-2016 The Khronos Group Inc. 2 // 3 // Permission is hereby granted, free of charge, to any person obtaining a 4 // copy of this software and/or associated documentation files (the 5 // "Materials"), to deal in the Materials without restriction, including 6 // without limitation the rights to use, copy, modify, merge, publish, 7 // distribute, sublicense, and/or sell copies of the Materials, and to 8 // permit persons to whom the Materials are furnished to do so, subject to 9 // the following conditions: 10 // 11 // The above copyright notice and this permission notice shall be included 12 // in all copies or substantial portions of the Materials. 13 // 14 // MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS 15 // KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS 16 // SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT 17 // https://www.khronos.org/registry/ 18 // 19 // THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20 // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 22 // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 23 // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 // MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. 26 27 #ifndef LIBSPIRV_INSTRUCTION_H_ 28 #define LIBSPIRV_INSTRUCTION_H_ 29 30 #include <cstdint> 31 #include <vector> 32 33 #include "spirv/1.1/spirv.h" 34 35 #include "table.h" 36 37 // Describes an instruction. 38 struct spv_instruction_t { 39 // Normally, both opcode and extInstType contain valid data. 40 // However, when the assembler parses !<number> as the first word in 41 // an instruction and opcode and extInstType are invalid. 42 SpvOp opcode; 43 spv_ext_inst_type_t extInstType; 44 45 // The Id of the result type, if this instruction has one. Zero otherwise. 46 uint32_t resultTypeId; 47 48 // The instruction, as a sequence of 32-bit words. 49 // For a regular instruction the opcode and word count are combined 50 // in words[0], as described in the SPIR-V spec. 51 // Otherwise, the first token was !<number>, and that number appears 52 // in words[0]. Subsequent elements are the result of parsing 53 // tokens in the alternate parsing mode as described in syntax.md. 54 std::vector<uint32_t> words; 55 }; 56 57 // Appends a word to an instruction, without checking for overflow. 58 void spvInstructionAddWord(spv_instruction_t* inst, uint32_t value); 59 60 #endif // LIBSPIRV_INSTRUCTION_H_ 61
