/external/llvm/include/llvm/MC/ |
MachineLocation.h | 53 bool isReg() const { return IsRegister; }
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MCInst.h | 56 bool isReg() const { return Kind == kRegister; } 64 assert(isReg() && "This is not a register operand!"); 70 assert(isReg() && "This is not a register operand!");
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/external/llvm/lib/Target/Mips/InstPrinter/ |
MipsInstPrinter.cpp | 32 static bool isReg(const MCInst &MI, unsigned OpNo) { 33 assert(MI.getOperand(OpNo).isReg() && "Register operand expected."); 128 if (Op.isReg()) { 232 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) && 234 (isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS)); 237 return isReg<Mips::ZERO_64>(MI, 1) && printAlias("beqz", MI, 0, 2, OS); 240 return isReg<Mips::ZERO>(MI, 1) && printAlias("bnez", MI, 0, 2, OS); 243 return isReg<Mips::ZERO_64>(MI, 1) && printAlias("bnez", MI, 0, 2, OS); 246 return isReg<Mips::ZERO>(MI, 0) && printAlias("bal", MI, 1, OS) [all...] |
/external/swiftshader/third_party/LLVM/include/llvm/MC/ |
MachineLocation.h | 51 bool isReg() const { return IsRegister; }
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MCInst.h | 52 bool isReg() const { return Kind == kRegister; } 59 assert(isReg() && "This is not a register operand!"); 65 assert(isReg() && "This is not a register operand!");
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/sdk/find_java2/FindJava2/ |
FindJava2.cpp | 120 bool isReg = (p == javaPath);
121 if (isReg) {
124 _tprintf(_T("%c [%s] %s\n"), isReg ? '*' : ' ', p.getVersion(), p.mPath);
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/external/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 192 return isReg() ? 0 : SubReg_TargetFlags; 195 assert(!isReg() && "Register operands can't have target flags"); 200 assert(!isReg() && "Register operands can't have target flags"); 229 /// isReg - Tests if this is a MO_Register operand. 230 bool isReg() const { return OpKind == MO_Register; } 268 assert(isReg() && "This is not a register operand!"); 273 assert(isReg() && "Wrong MachineOperand accessor"); 278 assert(isReg() && "Wrong MachineOperand accessor"); 283 assert(isReg() && "Wrong MachineOperand accessor"); 288 assert(isReg() && "Wrong MachineOperand accessor") [all...] |
/external/llvm/utils/TableGen/ |
CodeGenInstruction.h | 326 bool isReg() const { return Kind == K_Reg; } 331 Record *getRegister() const { assert(isReg()); return R; }
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
StackSlotColoring.cpp | 416 bool isReg = SlotIsReg[SS]; 418 if (NewFI == -1 || (NewFI == (int)SS && !isReg)) 424 if (!isReg) 510 if (!MO.isReg()) 572 if (!MO.isReg())
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
MBlazeAsmParser.cpp | 175 bool isReg() const { return Kind == Register; } 365 if (!Base.isReg()) { 370 if (!Offset.isReg() && !Offset.isImm()) { 376 if (Offset.isReg())
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 525 if (MO.isReg()) { 683 if (MCOp1.isImm() && MCOp2.isReg() && [all...] |
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
MachineOperand.h | 190 /// isReg - Tests if this is a MO_Register operand. 191 bool isReg() const { return OpKind == MO_Register; } 222 assert(isReg() && "This is not a register operand!"); 227 assert(isReg() && "Wrong MachineOperand accessor"); 232 assert(isReg() && "Wrong MachineOperand accessor"); 237 assert(isReg() && "Wrong MachineOperand accessor"); 242 assert(isReg() && "Wrong MachineOperand accessor"); 247 assert(isReg() && "Wrong MachineOperand accessor"); 252 assert(isReg() && "Wrong MachineOperand accessor"); 257 assert(isReg() && "Wrong MachineOperand accessor") [all...] |
/external/swiftshader/third_party/LLVM/utils/TableGen/ |
CodeGenInstruction.h | 300 bool isReg() const { return Kind == K_Reg; } 305 Record *getRegister() const { assert(isReg()); return R; }
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FixedLenDecoderEmitter.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 404 if (MO.isReg()) { 556 if (MCOp1.isImm() && MCOp2.isReg() && 708 if (!MO.isReg()) { 787 if (!MO.isReg()) { [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/ |
X86AsmParser.cpp | 285 bool isReg() const { return Kind == Register; } 817 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) { 830 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) { 857 if (isSrcOp(*Op1) && Op2->isReg()) { 887 if (isDstOp(*Op2) && Op1->isReg()) { [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonHardwareLoops.cpp | 312 bool isReg() const { return Kind == CV_Register; } 316 assert(isReg() && "Wrong CountValue accessor"); 320 assert(isReg() && "Wrong CountValue accessor"); 329 if (isReg()) { OS << PrintReg(Contents.R.Reg, TRI, Contents.R.Sub); } 644 if (Op1.isReg()) { 664 if (InitialValue->isReg()) { 671 if (EndValue->isReg()) { 698 if (Start->isReg()) { 704 if (End->isReg()) { 711 if (!Start->isReg() && !Start->isImm() [all...] |
/external/llvm/lib/Target/SystemZ/AsmParser/ |
SystemZAsmParser.cpp | 196 bool isReg() const override { 199 bool isReg(RegisterKind RegKind) const { 310 bool isGR32() const { return isReg(GR32Reg); } 311 bool isGRH32() const { return isReg(GRH32Reg); } 313 bool isGR64() const { return isReg(GR64Reg); } 314 bool isGR128() const { return isReg(GR128Reg); } 315 bool isADDR32() const { return isReg(ADDR32Reg); } 316 bool isADDR64() const { return isReg(ADDR64Reg); } 318 bool isFP32() const { return isReg(FP32Reg); } 319 bool isFP64() const { return isReg(FP64Reg); [all...] |
/prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
inst.go | 414 func isReg(a Arg) bool {
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/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
inst.go | 414 func isReg(a Arg) bool {
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/external/llvm/lib/Target/Hexagon/AsmParser/ |
HexagonAsmParser.cpp | 240 bool isReg() const { return Kind == Register; } [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 661 bool isReg() const { return Kind == k_Register; } [all...] |
/external/valgrind/VEX/priv/ |
guest_x86_toIR.c | [all...] |
guest_amd64_toIR.c | [all...] |