1 /** @file 2 3 Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR> 4 5 6 This program and the accompanying materials are licensed and made available under 7 8 the terms and conditions of the BSD License that accompanies this distribution. 9 10 The full text of the license may be found at 11 12 http://opensource.org/licenses/bsd-license.php. 13 14 15 16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 17 18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 19 20 21 22 23 Module Name: 24 25 26 Platform.c 27 28 Abstract: 29 30 Platform Initialization Driver. 31 32 33 --*/ 34 35 #include "PlatformDxe.h" 36 #include "Platform.h" 37 #include "PchCommonDefinitions.h" 38 #include <Protocol/UsbPolicy.h> 39 #include <Protocol/PchPlatformPolicy.h> 40 #include <Protocol/TpmMp.h> 41 #include <Protocol/CpuIo2.h> 42 #include <Library/S3BootScriptLib.h> 43 #include <Guid/PciLanInfo.h> 44 #include <Guid/ItkData.h> 45 #include <Library/PciLib.h> 46 #include <PlatformBootMode.h> 47 #include <Guid/EventGroup.h> 48 #include <Guid/Vlv2Variable.h> 49 #include <Protocol/GlobalNvsArea.h> 50 #include <Protocol/IgdOpRegion.h> 51 #include <Library/PcdLib.h> 52 #include <Protocol/VariableLock.h> 53 54 55 // 56 // VLV2 GPIO GROUP OFFSET 57 // 58 #define GPIO_SCORE_OFFSET 0x0000 59 #define GPIO_NCORE_OFFSET 0x1000 60 #define GPIO_SSUS_OFFSET 0x2000 61 62 typedef struct { 63 UINT32 offset; 64 UINT32 val; 65 } CFIO_PNP_INIT; 66 67 GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] = 68 { 69 // Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset 70 GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS ,NA ,F0 , , ,NONE ,0x47), 71 GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS ,NA ,F0 , , ,NONE ,0x41), 72 }; 73 74 75 EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID; 76 EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID; 77 SYSTEM_CONFIGURATION mSystemConfiguration; 78 SYSTEM_PASSWORDS mSystemPassword; 79 EFI_HANDLE mImageHandle; 80 BOOLEAN mMfgMode = FALSE; 81 VOID *mDxePlatformStringPack; 82 UINT32 mPlatformBootMode = PLATFORM_NORMAL_MODE; 83 extern CHAR16 gItkDataVarName[]; 84 85 86 EFI_PLATFORM_INFO_HOB mPlatformInfo; 87 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo; 88 EFI_EVENT mReadyToBootEvent; 89 90 UINT8 mSmbusRsvdAddresses[] = PLATFORM_SMBUS_RSVD_ADDRESSES; 91 UINT8 mNumberSmbusAddress = sizeof( mSmbusRsvdAddresses ) / sizeof( mSmbusRsvdAddresses[0] ); 92 UINT32 mSubsystemVidDid; 93 UINT32 mSubsystemAudioVidDid; 94 95 UINTN mPciLanCount = 0; 96 VOID *mPciLanInfo = NULL; 97 UINTN SpiBase; 98 99 static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface = { 100 ProgramToneFrequency, 101 GenerateBeepTone 102 }; 103 104 EFI_USB_POLICY_PROTOCOL mUsbPolicyData = {0}; 105 106 107 CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service[] = 108 { 109 {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0 110 {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0 111 {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0 112 {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0 113 {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0 114 {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0 115 {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0 116 {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0 117 {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0 118 {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val 119 {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val 120 {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val 121 {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val 122 {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val 123 {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val 124 {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val 125 {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val 126 {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val 127 }; 128 129 VOID 130 EfiOrMem ( 131 IN VOID *Destination, 132 IN VOID *Source, 133 IN UINTN Length 134 ); 135 136 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0) 137 STATIC 138 VOID 139 InitFirmwareId(); 140 #endif 141 142 143 VOID 144 InitializeClockRouting( 145 ); 146 147 VOID 148 InitializeSlotInfo ( 149 ); 150 151 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0 152 VOID 153 InitializeSensorInfoVariable ( 154 ); 155 #endif 156 157 VOID 158 InitTcoReset ( 159 ); 160 161 VOID 162 InitExI (); 163 164 VOID 165 InitItk(); 166 167 VOID 168 InitPlatformBootMode(); 169 170 VOID 171 InitMfgAndConfigModeStateVar(); 172 173 VOID 174 InitPchPlatformPolicy ( 175 IN EFI_PLATFORM_INFO_HOB *PlatformInfo 176 ); 177 178 VOID 179 InitVlvPlatformPolicy ( 180 ); 181 182 VOID 183 InitSioPlatformPolicy( 184 ); 185 186 VOID 187 PchInitBeforeBoot( 188 ); 189 190 VOID 191 UpdateDVMTSetup( 192 ); 193 194 VOID 195 InitPlatformUsbPolicy ( 196 VOID 197 ); 198 199 VOID 200 InitRC6Policy( 201 VOID 202 ); 203 204 205 EFI_STATUS 206 EFIAPI 207 SaveSetupRecoveryVar( 208 VOID 209 ) 210 { 211 EFI_STATUS Status = EFI_SUCCESS; 212 UINTN SizeOfNvStore = 0; 213 UINTN SizeOfSetupVar = 0; 214 SYSTEM_CONFIGURATION *SetupData = NULL; 215 SYSTEM_CONFIGURATION *RecoveryNvData = NULL; 216 EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock = NULL; 217 218 219 DEBUG ((EFI_D_INFO, "SaveSetupRecoveryVar() Entry \n")); 220 SizeOfNvStore = sizeof(SYSTEM_CONFIGURATION); 221 RecoveryNvData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION)); 222 if (NULL == RecoveryNvData) { 223 Status = EFI_OUT_OF_RESOURCES; 224 goto Exit; 225 } 226 227 Status = gRT->GetVariable( 228 L"SetupRecovery", 229 &gEfiNormalSetupGuid, 230 NULL, 231 &SizeOfNvStore, 232 RecoveryNvData 233 ); 234 235 if (EFI_ERROR (Status)) { 236 // Don't find the "SetupRecovery" variable. 237 // have to copy "Setup" variable to "SetupRecovery" variable. 238 SetupData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION)); 239 if (NULL == SetupData) { 240 Status = EFI_OUT_OF_RESOURCES; 241 goto Exit; 242 } 243 SizeOfSetupVar = sizeof(SYSTEM_CONFIGURATION); 244 Status = gRT->GetVariable( 245 NORMAL_SETUP_NAME, 246 &gEfiNormalSetupGuid, 247 NULL, 248 &SizeOfSetupVar, 249 SetupData 250 ); 251 ASSERT_EFI_ERROR (Status); 252 253 Status = gRT->SetVariable ( 254 L"SetupRecovery", 255 &gEfiNormalSetupGuid, 256 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS, 257 sizeof(SYSTEM_CONFIGURATION), 258 SetupData 259 ); 260 ASSERT_EFI_ERROR (Status); 261 262 Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **) &VariableLock); 263 if (!EFI_ERROR (Status)) { 264 Status = VariableLock->RequestToLock (VariableLock, L"SetupRecovery", &gEfiNormalSetupGuid); 265 ASSERT_EFI_ERROR (Status); 266 } 267 268 } 269 270 Exit: 271 if (RecoveryNvData) 272 FreePool (RecoveryNvData); 273 if (SetupData) 274 FreePool (SetupData); 275 276 return Status; 277 278 } 279 280 281 VOID 282 TristateLpcGpioConfig ( 283 IN UINT32 Gpio_Mmio_Offset, 284 IN UINT32 Gpio_Pin_Num, 285 GPIO_CONF_PAD_INIT* Gpio_Conf_Data 286 ) 287 288 { 289 UINT32 index; 290 UINT32 mmio_conf0; 291 UINT32 mmio_padval; 292 PAD_CONF0 conf0_val; 293 PAD_VAL pad_val; 294 295 // 296 // GPIO WELL -- Memory base registers 297 // 298 299 // 300 // A0 BIOS Spec doesn't mention it although X0 does. comment out now. 301 // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900 302 // 303 304 for(index=0; index < Gpio_Pin_Num; index++) 305 { 306 // 307 // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index. 308 // 309 mmio_conf0 = IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_CONF0 + Gpio_Conf_Data[index].offset * 16; 310 mmio_padval= IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_VAL + Gpio_Conf_Data[index].offset * 16; 311 312 #ifdef EFI_DEBUG 313 DEBUG ((EFI_D_INFO, "%s, ", Gpio_Conf_Data[index].pad_name)); 314 315 #endif 316 DEBUG ((EFI_D_INFO, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ", 317 Gpio_Conf_Data[index].usage, 318 Gpio_Conf_Data[index].func, 319 Gpio_Conf_Data[index].int_type, 320 Gpio_Conf_Data[index].pull, 321 mmio_conf0)); 322 323 // 324 // Step 1: PadVal Programming 325 // 326 pad_val.dw = MmioRead32(mmio_padval); 327 328 // 329 // Config PAD_VAL only for GPIO (Non-Native) Pin 330 // 331 if(Native != Gpio_Conf_Data[index].usage) 332 { 333 pad_val.dw &= ~0x6; // Clear bits 1:2 334 pad_val.dw |= (Gpio_Conf_Data[index].usage & 0x6); // Set bits 1:2 according to PadVal 335 336 // 337 // set GPO default value 338 // 339 if(Gpio_Conf_Data[index].usage == GPO && Gpio_Conf_Data[index].gpod4 != NA) 340 { 341 pad_val.r.pad_val = Gpio_Conf_Data[index].gpod4; 342 } 343 } 344 345 346 DEBUG ((EFI_D_INFO, "Set PAD_VAL = 0x%08x, ", pad_val.dw)); 347 348 MmioWrite32(mmio_padval, pad_val.dw); 349 350 // 351 // Step 2: CONF0 Programming 352 // Read GPIO default CONF0 value, which is assumed to be default value after reset. 353 // 354 conf0_val.dw = MmioRead32(mmio_conf0); 355 356 // 357 // Set Function # 358 // 359 conf0_val.r.Func_Pin_Mux = Gpio_Conf_Data[index].func; 360 361 if(GPO == Gpio_Conf_Data[index].usage) 362 { 363 // 364 // If used as GPO, then internal pull need to be disabled 365 // 366 conf0_val.r.Pull_assign = 0; // Non-pull 367 } 368 else 369 { 370 // 371 // Set PullUp / PullDown 372 // 373 if(P_20K_H == Gpio_Conf_Data[index].pull) 374 { 375 conf0_val.r.Pull_assign = 0x1; // PullUp 376 conf0_val.r.Pull_strength = 0x2;// 20K 377 } 378 else if(P_20K_L == Gpio_Conf_Data[index].pull) 379 { 380 conf0_val.r.Pull_assign = 0x2; // PullDown 381 conf0_val.r.Pull_strength = 0x2;// 20K 382 } 383 else if(P_NONE == Gpio_Conf_Data[index].pull) 384 { 385 conf0_val.r.Pull_assign = 0; // Non-pull 386 } 387 else 388 { 389 ASSERT(FALSE); // Invalid value 390 } 391 } 392 393 // 394 // Set INT Trigger Type 395 // 396 conf0_val.dw &= ~0x0f000000; // Clear bits 27:24 397 398 // 399 // Set INT Trigger Type 400 // 401 if(TRIG_ == Gpio_Conf_Data[index].int_type) 402 { 403 // 404 // Interrupt not capable, clear bits 27:24 405 // 406 } 407 else 408 { 409 conf0_val.dw |= (Gpio_Conf_Data[index].int_type & 0x0f)<<24; 410 } 411 412 DEBUG ((EFI_D_INFO, "Set CONF0 = 0x%08x\n", conf0_val.dw)); 413 414 // 415 // Write back the targeted GPIO config value according to platform (board) GPIO setting 416 // 417 MmioWrite32 (mmio_conf0, conf0_val.dw); 418 } 419 420 // A0 BIOS Spec doesn't mention it although X0 does. comment out now. 421 // GPIO SCORE write 0x01001002 to IOBASE + 0x0900 422 // 423 } 424 425 VOID 426 EFIAPI 427 SpiBiosProtectionFunction( 428 EFI_EVENT Event, 429 VOID *Context 430 ) 431 { 432 433 UINTN mPciD31F0RegBase; 434 UINTN BiosFlaLower0; 435 UINTN BiosFlaLimit0; 436 UINTN BiosFlaLower1; 437 UINTN BiosFlaLimit1; 438 439 440 BiosFlaLower0 = PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAreaBaseAddress); 441 BiosFlaLimit0 = PcdGet32(PcdFlashMicroCodeSize)-1; 442 #ifdef MINNOW2_FSP_BUILD 443 BiosFlaLower1 = PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseAddress); 444 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvFspBase)+PcdGet32(PcdFlashFvRecoverySize))-1; 445 #else 446 BiosFlaLower1 = PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBaseAddress); 447 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvMainBase)+PcdGet32(PcdFlashFvRecoverySize))-1; 448 #endif 449 450 451 mPciD31F0RegBase = MmPciAddress (0, 452 DEFAULT_PCI_BUS_NUMBER_PCH, 453 PCI_DEVICE_NUMBER_PCH_LPC, 454 PCI_FUNCTION_NUMBER_PCH_LPC, 455 0 456 ); 457 SpiBase = MmioRead32(mPciD31F0RegBase + R_PCH_LPC_SPI_BASE) & B_PCH_LPC_SPI_BASE_BAR; 458 459 // 460 //Set SMM_BWP, WPD and LE bit 461 // 462 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_SMM_BWP); 463 MmioAnd32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8)(~B_PCH_SPI_BCR_BIOSWE)); 464 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_BLE); 465 466 // 467 //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already. 468 // 469 if( (MmioRead16(SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) != 0 || 470 (MmioRead32(SpiBase + R_PCH_SPI_IND_LOCK)& B_PCH_SPI_IND_LOCK_PR0) != 0) { 471 // 472 //Already locked. we could take no action here 473 // 474 DEBUG((EFI_D_INFO, "PR0 already locked down. Stop configuring PR0.\n")); 475 return; 476 } 477 478 // 479 //Set PR0 480 // 481 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR0), 482 B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\ 483 (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16)); 484 485 // 486 //Set PR1 487 // 488 489 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR1), 490 B_PCH_SPI_PR1_RPE|B_PCH_SPI_PR1_WPE|\ 491 (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16)); 492 493 // 494 //Lock down PRx 495 // 496 MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN)); 497 498 // 499 // Verify if it's really locked. 500 // 501 if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) { 502 DEBUG((EFI_D_ERROR, "Failed to lock down PRx.\n")); 503 } 504 return; 505 506 } 507 508 VOID 509 EFIAPI 510 InitPciDevPME ( 511 EFI_EVENT Event, 512 VOID *Context 513 ) 514 { 515 UINTN VarSize; 516 EFI_STATUS Status; 517 518 VarSize = sizeof(SYSTEM_CONFIGURATION); 519 Status = gRT->GetVariable( 520 NORMAL_SETUP_NAME, 521 &gEfiNormalSetupGuid, 522 NULL, 523 &VarSize, 524 &mSystemConfiguration 525 ); 526 527 // 528 //Program HDA PME_EN 529 // 530 PchAzaliaPciCfg32Or (R_PCH_HDA_PCS, B_PCH_HDA_PCS_PMEE); 531 532 // 533 //Program SATA PME_EN 534 // 535 PchSataPciCfg32Or (R_PCH_SATA_PMCS, B_PCH_SATA_PMCS_PMEE); 536 537 DEBUG ((EFI_D_INFO, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration.EhciPllCfgEnable)); 538 if (mSystemConfiguration.EhciPllCfgEnable != 1) { 539 // 540 //Program EHCI PME_EN 541 // 542 PchMmPci32Or ( 543 0, 544 0, 545 PCI_DEVICE_NUMBER_PCH_USB, 546 PCI_FUNCTION_NUMBER_PCH_EHCI, 547 R_PCH_EHCI_PWR_CNTL_STS, 548 B_PCH_EHCI_PWR_CNTL_STS_PME_EN 549 ); 550 } 551 { 552 UINTN EhciPciMmBase; 553 UINT32 Buffer32 = 0; 554 555 EhciPciMmBase = MmPciAddress (0, 556 0, 557 PCI_DEVICE_NUMBER_PCH_USB, 558 PCI_FUNCTION_NUMBER_PCH_EHCI, 559 0 560 ); 561 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase)); 562 Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS); 563 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32)); 564 } 565 } 566 567 VOID 568 EFIAPI 569 InitThermalZone ( 570 EFI_EVENT Event, 571 VOID *Context 572 ) 573 { 574 UINTN VarSize; 575 EFI_STATUS Status; 576 EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea; 577 VarSize = sizeof(SYSTEM_CONFIGURATION); 578 Status = gRT->GetVariable( 579 NORMAL_SETUP_NAME, 580 &gEfiNormalSetupGuid, 581 NULL, 582 &VarSize, 583 &mSystemConfiguration 584 ); 585 Status = gBS->LocateProtocol ( 586 &gEfiGlobalNvsAreaProtocolGuid, 587 NULL, 588 (void **)&GlobalNvsArea 589 ); 590 GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint; 591 GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint; 592 } 593 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY 594 595 #endif 596 597 598 EFI_STATUS 599 EFIAPI 600 TristateLpcGpioS0i3Config ( 601 UINT32 Gpio_Mmio_Offset, 602 UINT32 Gpio_Pin_Num, 603 CFIO_PNP_INIT* Gpio_Conf_Data 604 ) 605 { 606 607 UINT32 index; 608 UINT32 mmio_reg; 609 UINT32 mmio_val; 610 611 DEBUG ((DEBUG_INFO, "TristateLpcGpioS0i3Config\n")); 612 613 for(index=0; index < Gpio_Pin_Num; index++) 614 { 615 mmio_reg = IO_BASE_ADDRESS + Gpio_Mmio_Offset + Gpio_Conf_Data[index].offset; 616 617 MmioWrite32(mmio_reg, Gpio_Conf_Data[index].val); 618 mmio_val = 0; 619 mmio_val = MmioRead32(mmio_reg); 620 621 DEBUG ((EFI_D_INFO, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg, mmio_val)); 622 } 623 624 return EFI_SUCCESS; 625 } 626 627 628 EFI_BOOT_SCRIPT_SAVE_PROTOCOL *mBootScriptSave; 629 630 /** 631 Event Notification during exit boot service to enabel ACPI mode 632 633 Disable SW SMI Timer, SMI from USB & Intel Specific USB 2 634 635 Clear all ACPI event status and disable all ACPI events 636 Disable PM sources except power button 637 Clear status bits 638 639 Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm") 640 641 Update EC to disable SMI and enable SCI 642 643 Enable SCI 644 645 Enable PME_B0_EN in GPE0a_EN 646 647 @param Event - EFI Event Handle 648 @param Context - Pointer to Notify Context 649 650 @retval Nothing 651 652 **/ 653 VOID 654 EFIAPI 655 EnableAcpiCallback ( 656 IN EFI_EVENT Event, 657 IN VOID *Context 658 ) 659 { 660 UINT32 RegData32; 661 UINT16 Pm1Cnt; 662 UINT16 AcpiBase; 663 UINT32 Gpe0aEn; 664 665 AcpiBase = MmioRead16 ( 666 PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH, 667 PCI_DEVICE_NUMBER_PCH_LPC, 668 PCI_FUNCTION_NUMBER_PCH_LPC) + R_PCH_LPC_ACPI_BASE 669 ) & B_PCH_LPC_ACPI_BASE_BAR; 670 671 DEBUG ((EFI_D_INFO, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase)); 672 673 // 674 // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2 675 // 676 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_EN); 677 RegData32 &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB2 | B_PCH_SMI_EN_INTEL_USB2); 678 IoWrite32(AcpiBase + R_PCH_SMI_EN, RegData32); 679 680 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS); 681 RegData32 |= B_PCH_SMI_STS_SWSMI_TMR; 682 IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32); 683 684 // 685 // Disable PM sources except power button 686 // power button is enabled only for PCAT. Disabled it on Tablet platform 687 // 688 689 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_EN, B_PCH_ACPI_PM1_EN_PWRBTN); 690 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_STS, 0xffff); 691 692 // 693 // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm") 694 // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid 695 // 696 IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, RTC_ADDRESS_REGISTER_D); 697 IoWrite8 (PCAT_RTC_DATA_REGISTER, 0x0); 698 699 RegData32 = IoRead32(AcpiBase + R_PCH_ALT_GP_SMI_EN); 700 RegData32 &= ~(BIT7); 701 IoWrite32((AcpiBase + R_PCH_ALT_GP_SMI_EN), RegData32); 702 703 // 704 // Enable SCI 705 // 706 Pm1Cnt = IoRead16(AcpiBase + R_PCH_ACPI_PM1_CNT); 707 Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN; 708 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt); 709 710 IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE 711 712 // 713 // Enable PME_B0_EN in GPE0a_EN 714 // Caution: Enable PME_B0_EN must be placed after enabling SCI. 715 // Otherwise, USB PME could not be handled as SMI event since no handler is there. 716 // 717 Gpe0aEn = IoRead32 (AcpiBase + R_PCH_ACPI_GPE0a_EN); 718 Gpe0aEn |= B_PCH_ACPI_GPE0a_EN_PME_B0; 719 IoWrite32(AcpiBase + R_PCH_ACPI_GPE0a_EN, Gpe0aEn); 720 721 } 722 723 /** 724 725 Routine Description: 726 727 This is the standard EFI driver point for the Driver. This 728 driver is responsible for setting up any platform specific policy or 729 initialization information. 730 731 @param ImageHandle Handle for the image of this driver. 732 @param SystemTable Pointer to the EFI System Table. 733 734 @retval EFI_SUCCESS Policy decisions set. 735 736 **/ 737 EFI_STATUS 738 EFIAPI 739 InitializePlatform ( 740 IN EFI_HANDLE ImageHandle, 741 IN EFI_SYSTEM_TABLE *SystemTable 742 ) 743 { 744 EFI_STATUS Status; 745 UINTN VarSize; 746 EFI_HANDLE Handle = NULL; 747 EFI_EVENT mEfiExitBootServicesEvent; 748 EFI_EVENT RtcEvent; 749 VOID *RtcCallbackReg = NULL; 750 751 mImageHandle = ImageHandle; 752 753 Status = gBS->InstallProtocolInterface ( 754 &Handle, 755 &gEfiSpeakerInterfaceProtocolGuid, 756 EFI_NATIVE_INTERFACE, 757 &mSpeakerInterface 758 ); 759 760 Status = gBS->LocateProtocol ( 761 &gEfiPciRootBridgeIoProtocolGuid, 762 NULL, 763 (VOID **) &mPciRootBridgeIo 764 ); 765 ASSERT_EFI_ERROR (Status); 766 767 VarSize = sizeof(EFI_PLATFORM_INFO_HOB); 768 Status = gRT->GetVariable( 769 L"PlatformInfo", 770 &gEfiVlv2VariableGuid, 771 NULL, 772 &VarSize, 773 &mPlatformInfo 774 ); 775 776 // 777 // Initialize Product Board ID variable 778 // 779 InitMfgAndConfigModeStateVar(); 780 InitPlatformBootMode(); 781 782 // 783 // Install Observable protocol 784 // 785 InitializeObservableProtocol(); 786 787 Status = SaveSetupRecoveryVar(); 788 if (EFI_ERROR (Status)) { 789 DEBUG ((EFI_D_ERROR, "InitializePlatform() Save SetupRecovery variable failed \n")); 790 } 791 792 VarSize = sizeof(SYSTEM_CONFIGURATION); 793 Status = gRT->GetVariable( 794 NORMAL_SETUP_NAME, 795 &gEfiNormalSetupGuid, 796 NULL, 797 &VarSize, 798 &mSystemConfiguration 799 ); 800 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) { 801 //The setup variable is corrupted 802 VarSize = sizeof(SYSTEM_CONFIGURATION); 803 Status = gRT->GetVariable( 804 L"SetupRecovery", 805 &gEfiNormalSetupGuid, 806 NULL, 807 &VarSize, 808 &mSystemConfiguration 809 ); 810 ASSERT_EFI_ERROR (Status); 811 Status = gRT->SetVariable ( 812 NORMAL_SETUP_NAME, 813 &gEfiNormalSetupGuid, 814 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS, 815 sizeof(SYSTEM_CONFIGURATION), 816 &mSystemConfiguration 817 ); 818 } 819 820 Status = EfiCreateEventReadyToBootEx ( 821 TPL_CALLBACK, 822 ReadyToBootFunction, 823 NULL, 824 &mReadyToBootEvent 825 ); 826 827 // 828 // Create a ReadyToBoot Event to run the PME init process 829 // 830 Status = EfiCreateEventReadyToBootEx ( 831 TPL_CALLBACK, 832 InitPciDevPME, 833 NULL, 834 &mReadyToBootEvent 835 ); 836 // 837 // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region 838 // 839 if(mSystemConfiguration.SpiRwProtect==1) { 840 Status = EfiCreateEventReadyToBootEx ( 841 TPL_CALLBACK, 842 SpiBiosProtectionFunction, 843 NULL, 844 &mReadyToBootEvent 845 ); 846 } 847 // 848 // Create a ReadyToBoot Event to run the thermalzone init process 849 // 850 Status = EfiCreateEventReadyToBootEx ( 851 TPL_CALLBACK, 852 InitThermalZone, 853 NULL, 854 &mReadyToBootEvent 855 ); 856 857 ReportStatusCodeEx ( 858 EFI_PROGRESS_CODE, 859 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1, 860 0, 861 &gEfiCallerIdGuid, 862 NULL, 863 NULL, 864 0 865 ); 866 867 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0 868 // 869 // Initialize Sensor Info variable 870 // 871 InitializeSensorInfoVariable(); 872 #endif 873 InitPchPlatformPolicy(&mPlatformInfo); 874 InitVlvPlatformPolicy(); 875 876 // 877 // Add usb policy 878 // 879 InitPlatformUsbPolicy(); 880 InitSioPlatformPolicy(); 881 InitializeClockRouting(); 882 InitializeSlotInfo(); 883 InitTcoReset(); 884 885 // 886 //Init ExI 887 // 888 InitExI(); 889 890 ReportStatusCodeEx ( 891 EFI_PROGRESS_CODE, 892 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP2, 893 0, 894 &gEfiCallerIdGuid, 895 NULL, 896 NULL, 897 0 898 ); 899 900 // 901 // Install PCI Bus Driver Hook 902 // 903 PciBusDriverHook(); 904 905 InitItk(); 906 907 ReportStatusCodeEx ( 908 EFI_PROGRESS_CODE, 909 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP3, 910 0, 911 &gEfiCallerIdGuid, 912 NULL, 913 NULL, 914 0 915 ); 916 917 918 // 919 // Initialize Password States and Callbacks 920 // 921 PchInitBeforeBoot(); 922 923 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY 924 925 #endif 926 927 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0) 928 // 929 // Re-write Firmware ID if it is changed 930 // 931 InitFirmwareId(); 932 #endif 933 934 ReportStatusCodeEx ( 935 EFI_PROGRESS_CODE, 936 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP4, 937 0, 938 &gEfiCallerIdGuid, 939 NULL, 940 NULL, 941 0 942 ); 943 944 945 Status = gBS->CreateEventEx ( 946 EVT_NOTIFY_SIGNAL, 947 TPL_NOTIFY, 948 EnableAcpiCallback, 949 NULL, 950 &gEfiEventExitBootServicesGuid, 951 &mEfiExitBootServicesEvent 952 ); 953 954 // 955 // Adjust RTC deafult time to be BIOS-built time. 956 // 957 Status = gBS->CreateEvent ( 958 EVT_NOTIFY_SIGNAL, 959 TPL_CALLBACK, 960 AdjustDefaultRtcTimeCallback, 961 NULL, 962 &RtcEvent 963 ); 964 if (!EFI_ERROR (Status)) { 965 Status = gBS->RegisterProtocolNotify ( 966 &gExitPmAuthProtocolGuid, 967 RtcEvent, 968 &RtcCallbackReg 969 ); 970 971 } 972 973 return EFI_SUCCESS; 974 } 975 976 /** 977 Source Or Destination with Length bytes. 978 979 @param[in] Destination Target memory 980 @param[in] Source Source memory 981 @param[in] Length Number of bytes 982 983 @retval None 984 985 **/ 986 VOID 987 EfiOrMem ( 988 IN VOID *Destination, 989 IN VOID *Source, 990 IN UINTN Length 991 ) 992 { 993 CHAR8 *Destination8; 994 CHAR8 *Source8; 995 996 if (Source < Destination) { 997 Destination8 = (CHAR8 *) Destination + Length - 1; 998 Source8 = (CHAR8 *) Source + Length - 1; 999 while (Length--) { 1000 *(Destination8--) |= *(Source8--); 1001 } 1002 } else { 1003 Destination8 = (CHAR8 *) Destination; 1004 Source8 = (CHAR8 *) Source; 1005 while (Length--) { 1006 *(Destination8++) |= *(Source8++); 1007 } 1008 } 1009 } 1010 1011 VOID 1012 PchInitBeforeBoot() 1013 { 1014 // 1015 // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume. 1016 // 1017 S3BootScriptSaveMemWrite ( 1018 EfiBootScriptWidthUint32, 1019 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)), 1020 1, 1021 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0))); 1022 1023 S3BootScriptSaveMemWrite ( 1024 EfiBootScriptWidthUint32, 1025 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)), 1026 1, 1027 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1))); 1028 1029 S3BootScriptSaveMemWrite ( 1030 EfiBootScriptWidthUint16, 1031 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE), 1032 1, 1033 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE)); 1034 1035 S3BootScriptSaveMemWrite ( 1036 EfiBootScriptWidthUint16, 1037 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP), 1038 1, 1039 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP)); 1040 1041 // 1042 // Saved MTPMC_1 for S3 resume. 1043 // 1044 S3BootScriptSaveMemWrite ( 1045 EfiBootScriptWidthUint32, 1046 (UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1), 1047 1, 1048 (VOID *)(UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1)); 1049 return; 1050 } 1051 1052 VOID 1053 EFIAPI 1054 ReadyToBootFunction ( 1055 EFI_EVENT Event, 1056 VOID *Context 1057 ) 1058 { 1059 EFI_STATUS Status; 1060 EFI_ISA_ACPI_PROTOCOL *IsaAcpi; 1061 EFI_ISA_ACPI_DEVICE_ID IsaDevice; 1062 UINTN Size; 1063 UINT16 State; 1064 EFI_TPM_MP_DRIVER_PROTOCOL *TpmMpDriver; 1065 EFI_CPU_IO_PROTOCOL *CpuIo; 1066 UINT8 Data; 1067 UINT8 ReceiveBuffer [64]; 1068 UINT32 ReceiveBufferSize; 1069 1070 UINT8 TpmForceClearCommand [] = {0x00, 0xC1, 1071 0x00, 0x00, 0x00, 0x0A, 1072 0x00, 0x00, 0x00, 0x5D}; 1073 UINT8 TpmPhysicalPresenceCommand [] = {0x00, 0xC1, 1074 0x00, 0x00, 0x00, 0x0C, 1075 0x40, 0x00, 0x00, 0x0A, 1076 0x00, 0x00}; 1077 UINT8 TpmPhysicalDisableCommand [] = {0x00, 0xC1, 1078 0x00, 0x00, 0x00, 0x0A, 1079 0x00, 0x00, 0x00, 0x70}; 1080 UINT8 TpmPhysicalEnableCommand [] = {0x00, 0xC1, 1081 0x00, 0x00, 0x00, 0x0A, 1082 0x00, 0x00, 0x00, 0x6F}; 1083 UINT8 TpmPhysicalSetDeactivatedCommand [] = {0x00, 0xC1, 1084 0x00, 0x00, 0x00, 0x0B, 1085 0x00, 0x00, 0x00, 0x72, 1086 0x00}; 1087 UINT8 TpmSetOwnerInstallCommand [] = {0x00, 0xC1, 1088 0x00, 0x00, 0x00, 0x0B, 1089 0x00, 0x00, 0x00, 0x71, 1090 0x00}; 1091 1092 Size = sizeof(UINT16); 1093 Status = gRT->GetVariable ( 1094 VAR_EQ_FLOPPY_MODE_DECIMAL_NAME, 1095 &gEfiNormalSetupGuid, 1096 NULL, 1097 &Size, 1098 &State 1099 ); 1100 1101 // 1102 // Disable Floppy Controller if needed 1103 // 1104 Status = gBS->LocateProtocol (&gEfiIsaAcpiProtocolGuid, NULL, (VOID **) &IsaAcpi); 1105 if (!EFI_ERROR(Status) && (State == 0x00)) { 1106 IsaDevice.HID = EISA_PNP_ID(0x604); 1107 IsaDevice.UID = 0; 1108 Status = IsaAcpi->EnableDevice(IsaAcpi, &IsaDevice, FALSE); 1109 } 1110 1111 // 1112 // save LAN info to a variable 1113 // 1114 if (NULL != mPciLanInfo) { 1115 gRT->SetVariable ( 1116 L"PciLanInfo", 1117 &gEfiPciLanInfoGuid, 1118 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, 1119 mPciLanCount * sizeof(PCI_LAN_INFO), 1120 mPciLanInfo 1121 ); 1122 } 1123 1124 if (NULL != mPciLanInfo) { 1125 gBS->FreePool (mPciLanInfo); 1126 mPciLanInfo = NULL; 1127 } 1128 1129 1130 // 1131 // Handle ACPI OS TPM requests here 1132 // 1133 Status = gBS->LocateProtocol ( 1134 &gEfiCpuIoProtocolGuid, 1135 NULL, 1136 (VOID **)&CpuIo 1137 ); 1138 Status = gBS->LocateProtocol ( 1139 &gEfiTpmMpDriverProtocolGuid, 1140 NULL, 1141 (VOID **)&TpmMpDriver 1142 ); 1143 if (!EFI_ERROR (Status)) 1144 { 1145 Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST); 1146 1147 // 1148 // Clear pending ACPI TPM request indicator 1149 // 1150 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0x00); 1151 if (Data != 0) 1152 { 1153 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, Data); 1154 1155 // 1156 // Assert Physical Presence for these commands 1157 // 1158 TpmPhysicalPresenceCommand [11] = 0x20; 1159 ReceiveBufferSize = sizeof(ReceiveBuffer); 1160 Status = TpmMpDriver->Transmit ( 1161 TpmMpDriver, TpmPhysicalPresenceCommand, 1162 sizeof (TpmPhysicalPresenceCommand), 1163 ReceiveBuffer, &ReceiveBufferSize 1164 ); 1165 // 1166 // PF PhysicalPresence = TRUE 1167 // 1168 TpmPhysicalPresenceCommand [11] = 0x08; 1169 ReceiveBufferSize = sizeof(ReceiveBuffer); 1170 Status = TpmMpDriver->Transmit ( 1171 TpmMpDriver, TpmPhysicalPresenceCommand, 1172 sizeof (TpmPhysicalPresenceCommand), 1173 ReceiveBuffer, 1174 &ReceiveBufferSize 1175 ); 1176 if (Data == 0x01) 1177 { 1178 // 1179 // TPM_PhysicalEnable 1180 // 1181 ReceiveBufferSize = sizeof(ReceiveBuffer); 1182 Status = TpmMpDriver->Transmit ( 1183 TpmMpDriver, TpmPhysicalEnableCommand, 1184 sizeof (TpmPhysicalEnableCommand), 1185 ReceiveBuffer, &ReceiveBufferSize 1186 ); 1187 } 1188 if (Data == 0x02) 1189 { 1190 // 1191 // TPM_PhysicalDisable 1192 // 1193 ReceiveBufferSize = sizeof(ReceiveBuffer); 1194 Status = TpmMpDriver->Transmit ( 1195 TpmMpDriver, TpmPhysicalDisableCommand, 1196 sizeof (TpmPhysicalDisableCommand), 1197 ReceiveBuffer, 1198 &ReceiveBufferSize 1199 ); 1200 } 1201 if (Data == 0x03) 1202 { 1203 // 1204 // TPM_PhysicalSetDeactivated=FALSE 1205 // 1206 ReceiveBufferSize = sizeof(ReceiveBuffer); 1207 TpmPhysicalSetDeactivatedCommand [10] = 0x00; 1208 Status = TpmMpDriver->Transmit ( 1209 TpmMpDriver, 1210 TpmPhysicalSetDeactivatedCommand, 1211 sizeof (TpmPhysicalSetDeactivatedCommand), 1212 ReceiveBuffer, &ReceiveBufferSize 1213 ); 1214 gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL); 1215 } 1216 if (Data == 0x04) 1217 { 1218 // 1219 // TPM_PhysicalSetDeactivated=TRUE 1220 // 1221 ReceiveBufferSize = sizeof(ReceiveBuffer); 1222 TpmPhysicalSetDeactivatedCommand [10] = 0x01; 1223 Status = TpmMpDriver->Transmit ( 1224 TpmMpDriver, 1225 TpmPhysicalSetDeactivatedCommand, 1226 sizeof (TpmPhysicalSetDeactivatedCommand), 1227 ReceiveBuffer, 1228 &ReceiveBufferSize 1229 ); 1230 gRT->ResetSystem ( 1231 EfiResetWarm, 1232 EFI_SUCCESS, 1233 0, 1234 NULL 1235 ); 1236 } 1237 if (Data == 0x05) 1238 { 1239 // 1240 // TPM_ForceClear 1241 // 1242 ReceiveBufferSize = sizeof(ReceiveBuffer); 1243 Status = TpmMpDriver->Transmit ( 1244 TpmMpDriver, 1245 TpmForceClearCommand, 1246 sizeof (TpmForceClearCommand), 1247 ReceiveBuffer, 1248 &ReceiveBufferSize 1249 ); 1250 gRT->ResetSystem ( 1251 EfiResetWarm, 1252 EFI_SUCCESS, 1253 0, 1254 NULL 1255 ); 1256 } 1257 if (Data == 0x06) 1258 { 1259 // 1260 // TPM_PhysicalEnable 1261 // 1262 ReceiveBufferSize = sizeof(ReceiveBuffer); 1263 Status = TpmMpDriver->Transmit ( 1264 TpmMpDriver, 1265 TpmPhysicalEnableCommand, 1266 sizeof (TpmPhysicalEnableCommand), 1267 ReceiveBuffer, 1268 &ReceiveBufferSize 1269 ); 1270 // 1271 // TPM_PhysicalSetDeactivated=FALSE 1272 // 1273 ReceiveBufferSize = sizeof(ReceiveBuffer); 1274 TpmPhysicalSetDeactivatedCommand [10] = 0x00; 1275 Status = TpmMpDriver->Transmit ( 1276 TpmMpDriver, 1277 TpmPhysicalSetDeactivatedCommand, 1278 sizeof (TpmPhysicalSetDeactivatedCommand), 1279 ReceiveBuffer, 1280 &ReceiveBufferSize 1281 ); 1282 gRT->ResetSystem ( 1283 EfiResetWarm, 1284 EFI_SUCCESS, 1285 0, 1286 NULL 1287 ); 1288 } 1289 if (Data == 0x07) 1290 { 1291 // 1292 // TPM_PhysicalSetDeactivated=TRUE 1293 // 1294 ReceiveBufferSize = sizeof(ReceiveBuffer); 1295 TpmPhysicalSetDeactivatedCommand [10] = 0x01; 1296 Status = TpmMpDriver->Transmit ( 1297 TpmMpDriver, 1298 TpmPhysicalSetDeactivatedCommand, 1299 sizeof (TpmPhysicalSetDeactivatedCommand), 1300 ReceiveBuffer, 1301 &ReceiveBufferSize 1302 ); 1303 // 1304 // TPM_PhysicalDisable 1305 // 1306 ReceiveBufferSize = sizeof(ReceiveBuffer); 1307 Status = TpmMpDriver->Transmit ( 1308 TpmMpDriver, 1309 TpmPhysicalDisableCommand, 1310 sizeof (TpmPhysicalDisableCommand), 1311 ReceiveBuffer, 1312 &ReceiveBufferSize 1313 ); 1314 gRT->ResetSystem ( 1315 EfiResetWarm, 1316 EFI_SUCCESS, 1317 0, 1318 NULL 1319 ); 1320 } 1321 if (Data == 0x08) 1322 { 1323 // 1324 // TPM_SetOwnerInstall=TRUE 1325 // 1326 ReceiveBufferSize = sizeof(ReceiveBuffer); 1327 TpmSetOwnerInstallCommand [10] = 0x01; 1328 Status = TpmMpDriver->Transmit ( 1329 TpmMpDriver, 1330 TpmSetOwnerInstallCommand, 1331 sizeof (TpmSetOwnerInstallCommand), 1332 ReceiveBuffer, 1333 &ReceiveBufferSize 1334 ); 1335 } 1336 if (Data == 0x09) 1337 { 1338 // 1339 // TPM_SetOwnerInstall=FALSE 1340 // 1341 ReceiveBufferSize = sizeof(ReceiveBuffer); 1342 TpmSetOwnerInstallCommand [10] = 0x00; 1343 Status = TpmMpDriver->Transmit ( 1344 TpmMpDriver, 1345 TpmSetOwnerInstallCommand, 1346 sizeof (TpmSetOwnerInstallCommand), 1347 ReceiveBuffer, 1348 &ReceiveBufferSize 1349 ); 1350 } 1351 if (Data == 0x0A) 1352 { 1353 // 1354 // TPM_PhysicalEnable 1355 // 1356 ReceiveBufferSize = sizeof(ReceiveBuffer); 1357 Status = TpmMpDriver->Transmit ( 1358 TpmMpDriver, 1359 TpmPhysicalEnableCommand, 1360 sizeof (TpmPhysicalEnableCommand), 1361 ReceiveBuffer, 1362 &ReceiveBufferSize 1363 ); 1364 // 1365 // TPM_PhysicalSetDeactivated=FALSE 1366 // 1367 ReceiveBufferSize = sizeof(ReceiveBuffer); 1368 TpmPhysicalSetDeactivatedCommand [10] = 0x00; 1369 Status = TpmMpDriver->Transmit ( 1370 TpmMpDriver, 1371 TpmPhysicalSetDeactivatedCommand, 1372 sizeof (TpmPhysicalSetDeactivatedCommand), 1373 ReceiveBuffer, 1374 &ReceiveBufferSize 1375 ); 1376 // 1377 // Do TPM_SetOwnerInstall=TRUE on next reboot 1378 // 1379 1380 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0xF0); 1381 1382 gRT->ResetSystem ( 1383 EfiResetWarm, 1384 EFI_SUCCESS, 1385 0, 1386 NULL 1387 ); 1388 } 1389 if (Data == 0x0B) 1390 { 1391 // 1392 // TPM_SetOwnerInstall=FALSE 1393 // 1394 ReceiveBufferSize = sizeof(ReceiveBuffer); 1395 TpmSetOwnerInstallCommand [10] = 0x00; 1396 Status = TpmMpDriver->Transmit ( 1397 TpmMpDriver, 1398 TpmSetOwnerInstallCommand, 1399 sizeof (TpmSetOwnerInstallCommand), 1400 ReceiveBuffer, 1401 &ReceiveBufferSize 1402 ); 1403 // 1404 // TPM_PhysicalSetDeactivated=TRUE 1405 // 1406 ReceiveBufferSize = sizeof(ReceiveBuffer); 1407 TpmPhysicalSetDeactivatedCommand [10] = 0x01; 1408 Status = TpmMpDriver->Transmit ( 1409 TpmMpDriver, 1410 TpmPhysicalSetDeactivatedCommand, 1411 sizeof (TpmPhysicalSetDeactivatedCommand), 1412 ReceiveBuffer, 1413 &ReceiveBufferSize 1414 ); 1415 // 1416 // TPM_PhysicalDisable 1417 // 1418 ReceiveBufferSize = sizeof(ReceiveBuffer); 1419 Status = TpmMpDriver->Transmit ( 1420 TpmMpDriver, 1421 TpmPhysicalDisableCommand, 1422 sizeof (TpmPhysicalDisableCommand), 1423 ReceiveBuffer, 1424 &ReceiveBufferSize 1425 ); 1426 gRT->ResetSystem ( 1427 EfiResetWarm, 1428 EFI_SUCCESS, 1429 0, 1430 NULL 1431 ); 1432 } 1433 if (Data == 0x0E) 1434 { 1435 // 1436 // TPM_ForceClear 1437 // 1438 ReceiveBufferSize = sizeof(ReceiveBuffer); 1439 Status = TpmMpDriver->Transmit ( 1440 TpmMpDriver, 1441 TpmForceClearCommand, 1442 sizeof (TpmForceClearCommand), 1443 ReceiveBuffer, 1444 &ReceiveBufferSize 1445 ); 1446 // 1447 // TPM_PhysicalEnable 1448 // 1449 ReceiveBufferSize = sizeof(ReceiveBuffer); 1450 Status = TpmMpDriver->Transmit ( 1451 TpmMpDriver, 1452 TpmPhysicalEnableCommand, 1453 sizeof (TpmPhysicalEnableCommand), 1454 ReceiveBuffer, 1455 &ReceiveBufferSize 1456 ); 1457 // 1458 // TPM_PhysicalSetDeactivated=FALSE 1459 // 1460 ReceiveBufferSize = sizeof(ReceiveBuffer); 1461 TpmPhysicalSetDeactivatedCommand [10] = 0x00; 1462 Status = TpmMpDriver->Transmit ( 1463 TpmMpDriver, 1464 TpmPhysicalSetDeactivatedCommand, 1465 sizeof (TpmPhysicalSetDeactivatedCommand), 1466 ReceiveBuffer, 1467 &ReceiveBufferSize 1468 ); 1469 gRT->ResetSystem ( 1470 EfiResetWarm, 1471 EFI_SUCCESS, 1472 0, 1473 NULL 1474 ); 1475 } 1476 if (Data == 0xF0) 1477 { 1478 // 1479 // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE 1480 // 1481 ReceiveBufferSize = sizeof(ReceiveBuffer); 1482 TpmSetOwnerInstallCommand [10] = 0x01; 1483 Status = TpmMpDriver->Transmit ( 1484 TpmMpDriver, 1485 TpmSetOwnerInstallCommand, 1486 sizeof (TpmSetOwnerInstallCommand), 1487 ReceiveBuffer, 1488 &ReceiveBufferSize 1489 ); 1490 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, 0x0A); 1491 } 1492 // 1493 // Deassert Physical Presence 1494 // 1495 TpmPhysicalPresenceCommand [11] = 0x10; 1496 ReceiveBufferSize = sizeof(ReceiveBuffer); 1497 Status = TpmMpDriver->Transmit ( 1498 TpmMpDriver, 1499 TpmPhysicalPresenceCommand, 1500 sizeof (TpmPhysicalPresenceCommand), 1501 ReceiveBuffer, 1502 &ReceiveBufferSize 1503 ); 1504 } 1505 } 1506 1507 return; 1508 } 1509 1510 /** 1511 1512 Initializes manufacturing and config mode setting. 1513 1514 **/ 1515 VOID 1516 InitMfgAndConfigModeStateVar() 1517 { 1518 EFI_PLATFORM_SETUP_ID *BootModeBuffer; 1519 VOID *HobList; 1520 1521 1522 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid); 1523 if (HobList != NULL) { 1524 BootModeBuffer = GET_GUID_HOB_DATA (HobList); 1525 1526 // 1527 // Check if in Manufacturing mode 1528 // 1529 if ( !CompareMem ( 1530 &BootModeBuffer->SetupName, 1531 MANUFACTURE_SETUP_NAME, 1532 StrSize (MANUFACTURE_SETUP_NAME) 1533 ) ) { 1534 mMfgMode = TRUE; 1535 } 1536 1537 1538 1539 } 1540 1541 } 1542 1543 /** 1544 1545 Initializes manufacturing and config mode setting. 1546 1547 **/ 1548 VOID 1549 InitPlatformBootMode() 1550 { 1551 EFI_PLATFORM_SETUP_ID *BootModeBuffer; 1552 VOID *HobList; 1553 1554 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid); 1555 if (HobList != NULL) { 1556 BootModeBuffer = GET_GUID_HOB_DATA (HobList); 1557 mPlatformBootMode = BootModeBuffer->PlatformBootMode; 1558 } 1559 } 1560 1561 /** 1562 1563 Initializes ITK. 1564 1565 **/ 1566 VOID 1567 InitItk( 1568 ) 1569 { 1570 EFI_STATUS Status; 1571 UINT16 ItkModBiosState; 1572 UINT8 Value; 1573 UINTN DataSize; 1574 UINT32 Attributes; 1575 1576 // 1577 // Setup local variable according to ITK variable 1578 // 1579 // 1580 // Read ItkBiosModVar to determine if BIOS has been modified by ITK 1581 // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified 1582 // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK 1583 // 1584 DataSize = sizeof (Value); 1585 Status = gRT->GetVariable ( 1586 ITK_BIOS_MOD_VAR_NAME, 1587 &gItkDataVarGuid, 1588 &Attributes, 1589 &DataSize, 1590 &Value 1591 ); 1592 if (Status == EFI_NOT_FOUND) { 1593 // 1594 // Variable not found, hasn't been initialized, intialize to 0 1595 // 1596 Value=0x00; 1597 // 1598 // Write variable to flash. 1599 // 1600 gRT->SetVariable ( 1601 ITK_BIOS_MOD_VAR_NAME, 1602 &gItkDataVarGuid, 1603 EFI_VARIABLE_RUNTIME_ACCESS | 1604 EFI_VARIABLE_NON_VOLATILE | 1605 EFI_VARIABLE_BOOTSERVICE_ACCESS, 1606 sizeof (Value), 1607 &Value 1608 ); 1609 1610 } 1611 if ( (!EFI_ERROR (Status)) || (Status == EFI_NOT_FOUND) ) { 1612 if (Value == 0x00) { 1613 ItkModBiosState = 0x00; 1614 } else { 1615 ItkModBiosState = 0x01; 1616 } 1617 gRT->SetVariable ( 1618 VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME, 1619 &gEfiNormalSetupGuid, 1620 EFI_VARIABLE_BOOTSERVICE_ACCESS, 1621 2, 1622 (void *)&ItkModBiosState 1623 ); 1624 } 1625 } 1626 1627 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0) 1628 1629 /** 1630 1631 Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable. 1632 1633 **/ 1634 STATIC 1635 VOID 1636 InitFirmwareId( 1637 ) 1638 { 1639 EFI_STATUS Status; 1640 CHAR16 FirmwareIdNameWithPassword[] = FIRMWARE_ID_NAME_WITH_PASSWORD; 1641 1642 // 1643 // First try writing the variable without a password in case we are 1644 // upgrading from a BIOS without password protection on the FirmwareId 1645 // 1646 Status = gRT->SetVariable( 1647 (CHAR16 *)&gFirmwareIdName, 1648 &gFirmwareIdGuid, 1649 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | 1650 EFI_VARIABLE_RUNTIME_ACCESS, 1651 sizeof( FIRMWARE_ID ) - 1, 1652 FIRMWARE_ID 1653 ); 1654 1655 if (Status == EFI_INVALID_PARAMETER) { 1656 1657 // 1658 // Since setting the firmware id without the password failed, 1659 // a password must be required. 1660 // 1661 Status = gRT->SetVariable( 1662 (CHAR16 *)&FirmwareIdNameWithPassword, 1663 &gFirmwareIdGuid, 1664 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | 1665 EFI_VARIABLE_RUNTIME_ACCESS, 1666 sizeof( FIRMWARE_ID ) - 1, 1667 FIRMWARE_ID 1668 ); 1669 } 1670 } 1671 #endif 1672 1673 VOID 1674 UpdateDVMTSetup( 1675 ) 1676 { 1677 // 1678 // Workaround to support IIA bug. 1679 // IIA request to change option value to 4, 5 and 7 relatively 1680 // instead of 1, 2, and 3 which follow Lakeport Specs. 1681 // Check option value, temporary hardcode GraphicsDriverMemorySize 1682 // Option value to fulfill IIA requirment. So that user no need to 1683 // load default and update setupvariable after update BIOS. 1684 // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7. 1685 // *This is for broadwater and above product only. 1686 // 1687 1688 SYSTEM_CONFIGURATION SystemConfiguration; 1689 UINTN VarSize; 1690 EFI_STATUS Status; 1691 1692 VarSize = sizeof(SYSTEM_CONFIGURATION); 1693 Status = gRT->GetVariable( 1694 NORMAL_SETUP_NAME, 1695 &gEfiNormalSetupGuid, 1696 NULL, 1697 &VarSize, 1698 &SystemConfiguration 1699 ); 1700 1701 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) { 1702 //The setup variable is corrupted 1703 VarSize = sizeof(SYSTEM_CONFIGURATION); 1704 Status = gRT->GetVariable( 1705 L"SetupRecovery", 1706 &gEfiNormalSetupGuid, 1707 NULL, 1708 &VarSize, 1709 &SystemConfiguration 1710 ); 1711 ASSERT_EFI_ERROR (Status); 1712 } 1713 1714 if((SystemConfiguration.GraphicsDriverMemorySize < 4) && !EFI_ERROR(Status) ) { 1715 switch (SystemConfiguration.GraphicsDriverMemorySize){ 1716 case 1: 1717 SystemConfiguration.GraphicsDriverMemorySize = 4; 1718 break; 1719 case 2: 1720 SystemConfiguration.GraphicsDriverMemorySize = 5; 1721 break; 1722 case 3: 1723 SystemConfiguration.GraphicsDriverMemorySize = 7; 1724 break; 1725 default: 1726 break; 1727 } 1728 1729 Status = gRT->SetVariable ( 1730 NORMAL_SETUP_NAME, 1731 &gEfiNormalSetupGuid, 1732 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS, 1733 sizeof(SYSTEM_CONFIGURATION), 1734 &SystemConfiguration 1735 ); 1736 } 1737 } 1738 1739 VOID 1740 InitPlatformUsbPolicy ( 1741 VOID 1742 ) 1743 1744 { 1745 EFI_HANDLE Handle; 1746 EFI_STATUS Status; 1747 1748 Handle = NULL; 1749 1750 mUsbPolicyData.Version = (UINT8)USB_POLICY_PROTOCOL_REVISION_2; 1751 mUsbPolicyData.UsbMassStorageEmulationType = mSystemConfiguration.UsbBIOSINT13DeviceEmulation; 1752 if(mUsbPolicyData.UsbMassStorageEmulationType == 3) { 1753 mUsbPolicyData.UsbEmulationSize = mSystemConfiguration.UsbBIOSINT13DeviceEmulationSize; 1754 } else { 1755 mUsbPolicyData.UsbEmulationSize = 0; 1756 } 1757 mUsbPolicyData.UsbZipEmulationType = mSystemConfiguration.UsbZipEmulation; 1758 mUsbPolicyData.UsbOperationMode = HIGH_SPEED; 1759 1760 // 1761 // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP 1762 // 1763 mUsbPolicyData.USBPeriodSupport = LEGACY_PERIOD_UN_SUPP; 1764 1765 // 1766 // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP 1767 // 1768 mUsbPolicyData.LegacyFreeSupport = LEGACY_FREE_UN_SUPP; 1769 1770 // 1771 // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00 1772 // 1773 mUsbPolicyData.CodeBase = (UINT8)ICBD_CODE_BASE; 1774 1775 // 1776 // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset, 1777 // default is Ich acpibase =0x040. acpitimerreg=0x08. 1778 mUsbPolicyData.LpcAcpiBase = 0x40; 1779 mUsbPolicyData.AcpiTimerReg = 0x08; 1780 1781 // 1782 // Set for reduce usb post time 1783 // 1784 mUsbPolicyData.UsbTimeTue = 0x00; 1785 mUsbPolicyData.InternelHubExist = 0x00; //TigerPoint doesn't have RMH 1786 mUsbPolicyData.EnumWaitPortStableStall = 100; 1787 1788 1789 Status = gBS->InstallProtocolInterface ( 1790 &Handle, 1791 &gUsbPolicyGuid, 1792 EFI_NATIVE_INTERFACE, 1793 &mUsbPolicyData 1794 ); 1795 ASSERT_EFI_ERROR(Status); 1796 1797 } 1798 1799 UINT8 1800 ReadCmosBank1Byte ( 1801 IN EFI_CPU_IO_PROTOCOL *CpuIo, 1802 IN UINT8 Index 1803 ) 1804 { 1805 UINT8 Data; 1806 1807 CpuIo->Io.Write (CpuIo, EfiCpuIoWidthUint8, 0x72, 1, &Index); 1808 CpuIo->Io.Read (CpuIo, EfiCpuIoWidthUint8, 0x73, 1, &Data); 1809 return Data; 1810 } 1811 1812 VOID 1813 WriteCmosBank1Byte ( 1814 IN EFI_CPU_IO_PROTOCOL *CpuIo, 1815 IN UINT8 Index, 1816 IN UINT8 Data 1817 ) 1818 { 1819 CpuIo->Io.Write ( 1820 CpuIo, 1821 EfiCpuIoWidthUint8, 1822 0x72, 1823 1, 1824 &Index 1825 ); 1826 CpuIo->Io.Write ( 1827 CpuIo, 1828 EfiCpuIoWidthUint8, 1829 0x73, 1830 1, 1831 &Data 1832 ); 1833 } 1834 1835
