| /art/compiler/jni/quick/ |
| jni_compiler.cc | 359 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
360 __ CreateHandleScopeEntry(out_reg, class_handle_scope_offset,
406 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
407 __ CreateHandleScopeEntry(out_reg, locked_object_handle_scope_offset,
481 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
482 __ CreateHandleScopeEntry(out_reg, handle_scope_offset,
600 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); local
601 __ Load(out_reg, saved_cookie_offset, 4);
612 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); local
613 __ CreateHandleScopeEntry(out_reg, locked_object_handle_scope_offset
701 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); local
725 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); local
[all...] |
| /art/compiler/utils/arm/ |
| jni_macro_assembler_arm_vixl.cc | 438 ArmManagedRegister out_reg = mout_reg.AsArm(); local
441 CHECK(out_reg.IsCoreRegister()) << out_reg;
443 temps.Exclude(out_reg.AsVIXLRegister());
447 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
450 out_reg.AsVIXLRegister(),
453 in_reg = out_reg;
460 if (!out_reg.Equals(in_reg)) {
465 ___ mov(eq, out_reg.AsVIXLRegister(), 0);
466 asm_.AddConstantInIt(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value(), ne)
[all...] |
| jni_macro_assembler_arm.cc | 476 ArmManagedRegister out_reg = mout_reg.AsArm(); local
479 CHECK(out_reg.IsCoreRegister()) << out_reg;
483 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
485 __ LoadFromOffset(kLoadWord, out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
486 in_reg = out_reg;
489 if (!out_reg.Equals(in_reg)) {
491 __ LoadImmediate(out_reg.AsCoreRegister(), 0, EQ);
495 __ AddConstant(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), NE);
497 __ AddConstant(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), AL)
523 ArmManagedRegister out_reg = mout_reg.AsArm(); local
[all...] |
| /art/compiler/utils/x86/ |
| jni_macro_assembler_x86.cc | 427 X86ManagedRegister out_reg = mout_reg.AsX86(); local
430 CHECK(out_reg.IsCpuRegister());
434 if (!out_reg.Equals(in_reg)) {
435 __ xorl(out_reg.AsCpuRegister(), out_reg.AsCpuRegister());
439 __ leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset));
442 __ leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset));
468 X86ManagedRegister out_reg = mout_reg.AsX86(); local
470 CHECK(out_reg.IsCpuRegister());
473 if (!out_reg.Equals(in_reg))
[all...] |
| /art/compiler/utils/x86_64/ |
| jni_macro_assembler_x86_64.cc | 478 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); local
481 // Use out_reg as indicator of null.
482 in_reg = out_reg;
487 CHECK(out_reg.IsCpuRegister());
491 if (!out_reg.Equals(in_reg)) {
492 __ xorl(out_reg.AsCpuRegister(), out_reg.AsCpuRegister());
496 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
499 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
525 X86_64ManagedRegister out_reg = mout_reg.AsX86_64() local
[all...] |
| /art/compiler/utils/arm64/ |
| jni_macro_assembler_arm64.cc | 562 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); local
566 CHECK(out_reg.IsXRegister()) << out_reg;
570 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
572 LoadWFromOffset(kLoadWord, out_reg.AsOverlappingWRegister(), SP,
574 in_reg = out_reg;
577 if (!out_reg.Equals(in_reg)) {
578 LoadImmediate(out_reg.AsXRegister(), 0, eq);
580 AddConstant(out_reg.AsXRegister(), SP, handle_scope_offs.Int32Value(), ne);
582 AddConstant(out_reg.AsXRegister(), SP, handle_scope_offs.Int32Value(), al)
609 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); local
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 439 Register out_reg = output.AsRegister<Register>(); local
442 __ add(out_reg, in_reg, ShifterOperand(mask));
443 __ eor(out_reg, mask, ShifterOperand(out_reg));
[all...] |
| intrinsics_arm64.cc | 486 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); local
488 __ Fabs(out_reg, in_reg);
522 Register out_reg = is64bit ? XRegisterFrom(output) : WRegisterFrom(output); local
525 __ Cneg(out_reg, in_reg, lt);
554 FPRegister out_reg = is_double ? DRegisterFrom(out) : SRegisterFrom(out); local
556 __ Fmin(out_reg, op1_reg, op2_reg);
558 __ Fmax(out_reg, op1_reg, op2_reg);
614 Register out_reg = is_long ? XRegisterFrom(out) : WRegisterFrom(out); local
617 __ Csel(out_reg, op1_reg, op2_reg, is_min ? lt : gt);
718 Register out_reg = is_double ? XRegisterFrom(l->Out()) : WRegisterFrom(l->Out()) local
[all...] |
| intrinsics_arm_vixl.cc | 497 vixl32::Register out_reg = RegisterFrom(output); local
500 __ Add(out_reg, in_reg, mask);
501 __ Eor(out_reg, mask, out_reg);
820 vixl32::Register out_reg = OutputRegister(invoke); local
828 __ Vmov(out_reg, temp1);
831 __ Cmp(out_reg, 0);
836 // If input is a negative tie, change rounding direction to positive infinity, out_reg += 1.
[all...] |
| code_generator_x86_64.cc | 6461 CpuRegister out_reg = out.AsRegister<CpuRegister>(); local
6494 CpuRegister out_reg = out.AsRegister<CpuRegister>(); local
[all...] |
| code_generator_arm.cc | 4645 Register out_reg = out.AsRegister<Register>(); local
5452 DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()); local
7597 Register out_reg = out.AsRegister<Register>(); local
7792 Register out_reg = out.AsRegister<Register>(); local
7826 Register out_reg = out.AsRegister<Register>(); local
7863 Register out_reg = out.AsRegister<Register>(); local
7897 Register out_reg = out.AsRegister<Register>(); local
[all...] |
| code_generator_arm_vixl.cc | 4344 vixl32::Register out_reg = OutputRegister(rem); local
4627 vixl32::Register out_reg = OutputRegister(op); local
7669 vixl32::Register out_reg = RegisterFrom(out); local
7867 vixl32::Register out_reg = OutputRegister(instruction); local
7901 vixl32::Register out_reg = OutputRegister(instruction); local
7938 vixl32::Register out_reg = RegisterFrom(out); local
7952 __ Mov(RegisterFrom(maybe_temp), out_reg); local
7972 vixl32::Register out_reg = RegisterFrom(out); local
[all...] |
| code_generator_x86.cc | 7096 Register out_reg = out.AsRegister<Register>(); local
7129 Register out_reg = out.AsRegister<Register>(); local
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 3651 MipsManagedRegister out_reg = mout_reg.AsMips(); local
3700 MipsManagedRegister out_reg = mout_reg.AsMips(); local
[all...] |
| /external/valgrind/perf/ |
| tinycc.c | 17979 int nb_outputs, nb_operands, i, must_subst, out_reg; local
[all...] |
