| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| resource_conflict.s | 3 r6 = r1.h * r2.l || r6 = [p0 ++]; define
4 r6 = [p0++] || r6 = [i0]; define
6 r6.h = ashift r0.h by r1.l || r6 = [i0 ++ m0];
7 r6.h = ashift r0.h by r1.l || r6.h = W [p0];
8 r6.l = (a0 = r1.l * r2.l) || r6 = [i0--]
[all...] |
| parallel2.s | 9 R6 = a0 || P0 = [P4+44];
11 R6 = A0, R7 = a1 || P0 = [P4+52];
20 A0.h = r6.H || r0 = [i1 ++ m2];
44 r6 = AShiFT R5 by R2.L || r0 = [fp - 112]; define
46 r2 = ashift r6 BY r3.L (S) || r0 = [fp - 120];
61 r7.L = lshift r6.L BY r2.l || R5 = W [P2+20] (z);
63 A0 = Lshift a0 By R6.L || R5 = W [P2+16] (z);
67 R6 = Rot r7 by -31 || R5 = W [P2+10] (z);
68 R5 = RoT R7 by 31 || R6 = W [P2+8] (z);
78 A1 = rot a1 bY r6.l || R5 = W [P5++] (z)
[all...] |
| parallel4.s | 18 (R6, R0) = byteop16p (r1:0, r3:2) (r) || [i3++] = r0;
31 r6 = BYTEop2p (r1:0, r3:2) (tl, R) || [p3] = r0; define
36 (R6, R2) = ByteOp16M (r1:0, r3:2) || [p4] = r0;
43 (R6, R4) = BYTEUNPACK r3:2 (R) || [p5--] = r0;
|
| logical.s | 6 r6 = r1 & R2; define
21 R5 = r6 | R7;
|
| parallel.s | 3 r0 = DEPOSIT (r7, R6) (X) || I1 += 4;
8 r5 = ExtRACt (R6, R1.L) (x) || i0 -= 2;
14 BiTMux (R7, r6, a0) (ASl) || FP = [P1++];
28 r6.L = R6.L + r5.l (NS) || b [p1] = r0 || r4.L =w [i3++];
31 R3.H = r5 + r0 (rnd20) || r0 = b [p0] (x) || [i0] = R6;
35 r7.H = r7 + r6 (RND12) || r1 = b [p0] (x)|| [I3++m1]=r6;
40 r6.L = EXPADJ (r5, r4.l) || r1 = b [p3] (z) || W[I1--]=r3.h;
44 R6 = MAX (r5, R2) || r2 = b [p0] (x) || W[i1--]=R0.l
66 r6 = R5.H * r0.l || b [fp] = r4 || r7 = [i0++]; define
108 r6 = (A0 += R5.L * r3.h) (s2RND) || R3.L = W [I2--] || R1.H = w[i1]; define
[all...] |
| parallel3.s | 5 r0 = VIT_MAX (r0, r6) (asr)|| [p0--] = P0;
14 r7 = R0 -|+ r6|| [p1++] = P0;
18 r6 = r3 -|- R4|| [p1+40] = P0; define
19 r7 = R5 -|- R6 (co)|| [p2] = P0;
22 R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL)|| [p2--] = P0;
23 R7 = R1 +|- R2, R6 = R1 -|+ R2 (S)|| [p2+36] = P0;
26 R5 = R0 + R1, R6 = R0 - R1|| [p3] = P0;
30 r3 = a0 + a1, r6 = a0 - a1 (s)|| [p3+28] = P0;
45 R6 = MAX (R0, R1) (V)|| [p5++] = P0
89 r6 = PACK (r1.H, r6.H)|| [p0++p2] = r0; define
[all...] |
| video2.s | 16 R6 = ALIGN8(R7, R0);
18 R4 = ALIGN8(R5, R6);
21 R5 = ALIGN8(R6, R7);
30 R6 = ALIGN16(R7, R0);
32 R4 = ALIGN16(R5, R6);
35 R5 = ALIGN16(R6, R7);
44 R6 = ALIGN24(R7, R0);
46 R4 = ALIGN24(R5, R6);
49 R5 = ALIGN24(R6, R7);
66 r6 = byteop3p (r3:2, r1:0) (lo, r) define
149 r6 = byteop2p (r1:0, r3:2) (tl, r) ; define
158 r6 = byteop2p (r3:2, r3:2) (tl, r) ; define
[all...] |
| shift.s | 34 r6 = AShiFT R5 by R2.L; define
36 r2 = ashift r6 BY r3.L (S);
61 R6 <<= r0;
64 r7.L = lshift r6.L BY r2.l;
66 A0 = Lshift a0 By R6.L;
73 R6 = Rot r7 by -31;
84 A1 = rot a1 bY r6.l;
|
| video.s | 29 (R6, R0) = byteop16p (r1:0, r3:2) (r);
48 r6 = BYTEop2p (r1:0, r3:2) (tl, R); define
59 (R6, R2) = ByteOp16M (r1:0, r3:2);
72 (R6, R4) = BYTEUNPACK r3:2 (R);
|
| /external/clang/test/CodeGen/ |
| builtins-ppc-crypto-disabled.c | 37 vector unsigned int r6 = __builtin_crypto_vshasigmaw(aw, 1, 15); local
|
| /external/valgrind/none/tests/x86/ |
| incdec_alt.c | 7 int r1,r2,r3,r4,r5,r6,r7,r8,a1,a2; variable
40 "\tpopl " VG_SYM(r6) "\n"
58 r1=r2=r3=r4=r5=r6=r7=r8=0;
65 printf("0x%08x\n",r6);
|
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| filters_mips.c | 29 int32_t r4, r5, r6, r7; local
54 "lh %[r6], 12(%[in]) \n\t"
71 "madd %[r6], %[r6] \n\t"
124 [r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6), [r7] "=&r" (r7),
162 "lh %[r6], 6(%[in]) \n\t"
173 "madd %[r6], %[r7] \n\t"
195 [r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6), [r7] "=&r" (r7)
[all...] |
| transform_mips.c | 30 int32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9; local
61 "muleq_s.w.phr %[r6], %[r3], %[r1] \n\t"
68 "addu %[r4], %[r4], %[r6] \n\t"
84 "extr_r.w %[r6], $ac2, 16 \n\t"
94 "shra_r.w %[r6], %[r6], 3 \n\t"
96 "sw %[r6], 4(%[tmpre]) \n\t"
97 "absq_s.w %[r6], %[r6] \n\t"
102 "slt %[r1], %[r6], %[r7] \n\t
609 int32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, max, max1; local
[all...] |
| /external/aac/libFDK/src/arm/ |
| dct_arm.cpp | 107 r6 accu3
129 LDR r6, [r2, #4] // accu3 = pDat_0[1] local
134 SMLAWB r7, r6, r8, r7 // accu4 = accu4*val_tw.l+accu3*val_tw.h local
135 SMLAWT r6, r6, r8, r9 // accu3 = accu3*val_tw.l-accu4*val_tw.h local
139 STR r6, [r3], #-4 // *pDat_1-- = accu3 local
155 LDR r6, [r2, #4] // accu3 = pDat_0[1] local
160 SMLAWB r7, r6, r8, r7 // accu4 = accu4*val_tw.l+accu3*val_tw.h local
161 SMLAWT r6, r6, r8, r9 // accu3 = accu3*val_tw.l-accu4*val_tw. local
165 STR r6, [r3], #-4 \/\/ *pDat_1-- = accu3 local
296 LDR r6, [r2, #4] \/\/ accu3 = pDat_0[1] local
310 SMULWB r4, r6, r8 \/\/ accu1 = (-accu4)*val_tw.l local
312 SMLAWT r6, r6, r8, r5 \/\/ accu3 = (-accu4)*val_tw.l-(-accu3)*val_tw.h local
314 STR r6, [r3, #-4] ! \/\/ *--pDat_1 = accu3 local
319 LDR r6, [r2, #4] \/\/ accu3 = pDat_0[1] local
333 SMULWB r4, r6, r8 \/\/ accu1 = (-accu4)*val_tw.l local
335 SMLAWT r6, r6, r8, r5 \/\/ accu3 = (-accu4)*val_tw.l-(-accu3)*val_tw.h local
337 STR r6, [r3, #-4] ! \/\/ *--pDat_1 = accu3 local
[all...] |
| /frameworks/av/media/libstagefright/codecs/m4v_h263/dec/src/ |
| idct.cpp | 131 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; /* butterfly nodes */ local
155 r6 = blk[B_SIZE * 5 + i];
158 if (!(r1 | r2 | r3 | r4 | r5 | r6 | r7))
187 r8 = W3 * (r6 + r7);
188 r6 = (r8 - (W3 - W5) * r6);
199 r1 = r4 + r6;
200 r4 -= r6;
201 r6 = r5 + r7;
221 tmpBLK32[(3<<3) + i] = (r8 + r6) >> 8
353 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; \/* butterfly nodes *\/ local
[all...] |
| /prebuilts/go/darwin-x86/test/ |
| rune.go | 19 r6 = 'b'<<2
22 r = []rune{r0, r1, r2, r3, r4, r5, r6, r7}
18 r6 = 'b'<<2 var
|
| /prebuilts/go/linux-x86/test/ |
| rune.go | 19 r6 = 'b'<<2
22 r = []rune{r0, r1, r2, r3, r4, r5, r6, r7}
18 r6 = 'b'<<2 var
|
| /art/runtime/arch/mips/ |
| instruction_set_features_mips.cc | 50 static void GetFlagsFromCppDefined(bool* mips_isa_gte2, bool* r6, bool* fpu_32bit) {
65 *r6 = true;
67 *r6 = false;
78 bool r6; local
79 GetFlagsFromCppDefined(&mips_isa_gte2, &r6, &fpu_32bit);
82 // Only care if it is R1, R2, R5 or R6 and we assume all CPUs will have a FP unit.
87 r6 = (variant[kPrefixLength] >= '6');
93 // Note, we get FPU bitness and R6-ness from the build (using cpp defines, see above)
95 // sufficient for most purposes. That is, "default" should work for both R2 and R6.
103 return MipsFeaturesUniquePtr(new MipsInstructionSetFeatures(fpu_32bit, mips_isa_gte2, r6));
109 bool r6 = (bitmap & kR6) != 0; local
116 bool r6; local
125 bool r6; local
180 bool r6 = r6_; local
[all...] |
| /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/ |
| pendsv.h | 31 uint32_t r4, r5, r6, r7; member in struct:PendsvRegsHi
|
| /prebuilts/go/darwin-x86/test/fixedbugs/ |
| bug249.go | 31 var r6 chan<- (<-chan int) = (chan <- <- chan int)(nil) var
|
| /prebuilts/go/linux-x86/test/fixedbugs/ |
| bug249.go | 31 var r6 chan<- (<-chan int) = (chan <- <- chan int)(nil) var
|
| /external/boringssl/src/crypto/aes/asm/ |
| bsaes-armv7.pl | 69 my ($key,$rounds,$const)=("r4","r5","r6");
916 my ($out,$inp,$rounds,$const)=("r12","r4","r5","r6");
1012 stmdb sp!,{r4-r6,lr}
1023 ldmia sp!,{r4-r6,pc}
1030 stmdb sp!,{r4-r6,lr}
1053 ldmia sp!,{r4-r6,pc}
1060 stmdb sp!,{r4-r6,lr}
1073 ldmia sp!,{r4-r6,pc}
1080 stmdb sp!,{r4-r6,lr}
1103 ldmia sp!,{r4-r6,pc
1987 sub r6, $out, #0x10 subroutine
[all...] |
| /external/libavc/common/ |
| ih264_resi_trans_quant.c | 662 WORD32 r0, r1, r2, r3, r4, r5, r6, r7; local
682 r6 = pu1_src[6];r6 -= pu1_pred[6];
687 a1 = r1 + r6;
703 a1 = r1 - r6;
735 r6 = pi2_out_tmp[48];
739 a1 = r1 + r6;
749 a1 = r1 - r6;
756 r6 = (a6>>1) - a7;
798 FWD_QUANT(r6, u4_abs_value, i4_sign, pu2_threshold_matrix[48]
[all...] |
| /external/libunwind/src/ia64/ |
| Gresume.c | 45 unw_word_t r6; member in struct:__anon24138
73 || (ret = ia64_get (c, c->loc[IA64_REG_R6], &extra.r6)) < 0
|
| /external/skia/tests/ |
| QuickRejectTest.cpp | 120 SkRect r6 = SkRect::MakeLTRB(-120.0f, -120.0f, -110.0f, -110.0f); local
131 REPORTER_ASSERT(reporter, true == canvas.quickReject(r6));
|
