| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen7_misc_state.c | 109 uint32_t tile_x = 0, tile_y = 0; local
119 tile_x = draw_x & tile_mask_x;
129 * We have no guarantee that tile_x and tile_y are correctly aligned,
134 * tile_x and tile_y to 0. This is a temporary workaround until we
137 tile_x &= ~7;
142 dw3 = ((srb->Base.Base.Width + tile_x - 1) << 4) |
152 OUT_BATCH(tile_x | (tile_y << 16));
157 uint32_t tile_x, tile_y, offset; local
161 tile_x = draw_x & tile_mask_x;
171 * We have no guarantee that tile_x and tile_y are correctly aligned
[all...] |
| gen7_wm_surface_state.c | 510 uint32_t tile_x, tile_y; local
552 surf->ss1.base_addr = intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
559 assert(tile_x % 4 == 0);
561 surf->ss5.x_offset = tile_x / 4;
|
| brw_misc_state.c | 372 uint32_t tile_x, tile_y; local
398 tile_x = draw_x & tile_mask_x;
408 * We have no guarantee that tile_x and tile_y are correctly aligned,
413 * tile_x and tile_y to 0. This is a temporary workaround until we come
417 tile_x &= ~7;
430 OUT_BATCH(((stencil_irb->Base.Base.Width + tile_x - 1) << 6) |
435 OUT_BATCH(tile_x | (tile_y << 16));
437 assert(tile_x == 0 && tile_y == 0);
446 uint32_t tile_x, tile_y, offset; local
456 tile_x = draw_x & tile_mask_x
[all...] |
| gen7_blorp.cpp | 153 uint32_t tile_x, tile_y; local
171 surf->ss1.base_addr = surface->compute_tile_offsets(&tile_x, &tile_y);
177 assert(tile_x % 4 == 0);
179 surf->ss5.x_offset = tile_x / 4;
589 uint32_t tile_x = draw_x & tile_mask_x; local
603 * We have no guarantee that tile_x and tile_y are correctly aligned,
608 * tile_x and tile_y to 0. This is a temporary workaround until we come
611 tile_x &= ~7;
628 OUT_BATCH((params->depth.width + tile_x - 1) << 4 |
631 OUT_BATCH(tile_x |
[all...] |
| gen6_blorp.cpp | 427 uint32_t tile_x, tile_y; local
439 surf[1] = (surface->compute_tile_offsets(&tile_x, &tile_y) +
461 assert(tile_x % 4 == 0);
463 surf[5] = ((tile_x / 4) << BRW_SURFACE_X_OFFSET_SHIFT |
841 uint32_t tile_x = draw_x & tile_mask_x; local
855 * We have no guarantee that tile_x and tile_y are correctly aligned,
860 * tile_x and tile_y to 0. This is a temporary workaround until we come
863 tile_x &= ~7;
884 (params->depth.width + tile_x - 1) << 6 |
887 OUT_BATCH(tile_x |
[all...] |
| brw_wm_surface_state.c | 1125 uint32_t tile_x, tile_y; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| intel_span.c | 75 uint32_t tile_x = x / tile_width; local
83 + tile_x * tile_size
|
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_rast.c | 340 const unsigned tile_x = task->x, tile_y = task->y; local
367 tile_x + x, tile_y + y);
370 depth = lp_rast_get_depth_block_pointer(task, tile_x + x, tile_y + y);
375 tile_x + x, tile_y + y,
|
| /external/ImageMagick/MagickCore/ |
| shear.c | 782 tile_x;
786 tile_x=0;
787 for ( ; tile_x < (ssize_t) image->columns; tile_x+=(ssize_t) tile_width)
806 if ((tile_x+(ssize_t) tile_width) > (ssize_t) image->columns)
807 width=(size_t) (tile_width-(tile_x+tile_width-image->columns));
811 p=GetCacheViewVirtualPixels(image_view,tile_x,tile_y,width,height,
829 (rotate_image->columns-(tile_y+height)),y+tile_x,height,1,
996 tile_x;
1000 tile_x=0
778 tile_x; local
992 tile_x; local
[all...] |
| /external/webp/src/enc/ |
| predictor_enc.c | 284 int tile_x, int tile_y, int bits,
292 const int start_x = tile_x << bits;
306 const int left_mode = (tile_x > 0) ?
307 (modes[tile_y * tiles_per_row + tile_x - 1] >> 8) & 0xff : 0xff;
309 (modes[(tile_y - 1) * tiles_per_row + tile_x] >> 8) & 0xff : 0xff;
470 int tile_x; local
471 for (tile_x = 0; tile_x < tiles_per_row; ++tile_x) {
472 const int pred = GetBestPredictorForTile(width, height, tile_x, tile_y
702 int tile_x, tile_y; local
[all...] |
| vp8l_enc.c | 653 int tile_x = x & tile_mask; local
660 if ((tile_x != (x & tile_mask)) || (tile_y != (y & tile_mask))) {
661 tile_x = x & tile_mask;
1387 int tile_x, tile_y; local
[all...] |
| /external/pdfium/third_party/libopenjpeg20/ |
| openjpeg.h | 820 int tile_x; member in struct:opj_codestream_info
[all...] |
