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    Searched refs:AARCH64_OPND_CLASS_SIMD_REG (Results 1 - 4 of 4) sorted by null

  /toolchain/binutils/binutils-2.25/opcodes/
aarch64-opc-2.c 50 {AARCH64_OPND_CLASS_SIMD_REG, "Vd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a SIMD vector register"},
51 {AARCH64_OPND_CLASS_SIMD_REG, "Vn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "a SIMD vector register"},
52 {AARCH64_OPND_CLASS_SIMD_REG, "Vm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rm}, "a SIMD vector register"},
aarch64-asm.c 900 == AARCH64_OPND_CLASS_SIMD_REG
    [all...]
aarch64-dis.c     [all...]
  /toolchain/binutils/binutils-2.25/include/opcode/
aarch64.h 81 AARCH64_OPND_CLASS_SIMD_REG,

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