| /toolchain/binutils/binutils-2.25/opcodes/ |
| d30v-opc.c | 228 { "bra", BRA, 0, { SHORT_B1, SHORT_B2r, LONG_Ur }, MU, FLAG_JMP, 0, RELOC_PCREL },
229 { "bratnz", BRA, 0x4, { SHORT_B3br, LONG_2br }, MU, FLAG_JMP, 0, RELOC_PCREL },
230 { "bratzr", BRA, 0x4, { SHORT_B3r, LONG_2r }, MU, FLAG_JMP, 0, RELOC_PCREL },
232 { "bsr", BRA, 0x2, { SHORT_B1, SHORT_B2r, LONG_Ur }, MU, FLAG_JSR, 0, RELOC_PCREL },
233 { "bsrtnz", BRA, 0x6, { SHORT_B3br, LONG_2br }, MU, FLAG_JSR, 0, RELOC_PCREL },
234 { "bsrtzr", BRA, 0x6, { SHORT_B3r, LONG_2r }, MU, FLAG_JSR, 0, RELOC_PCREL },
238 { "dbra", BRA, 0x10, { SHORT_B3r, LONG_2r }, MU, FLAG_JMP | FLAG_DELAY, FLAG_RP, RELOC_PCREL },
239 { "dbrai", BRA, 0x14, { SHORT_D2r, LONG_Dr }, MU, FLAG_JMP | FLAG_DELAY, FLAG_RP, RELOC_PCREL },
240 { "dbsr", BRA, 0x12, { SHORT_B3r, LONG_2r }, MU, FLAG_JSR | FLAG_DELAY, FLAG_RP, RELOC_PCREL }
[all...] |
| alpha-opc.c | 344 #define BRA(oo) BRA_(oo), BRA_MASK
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| d30v.h | 48 #define BRA 0
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 101 OP01(BRA)
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| rx-parse.y | 150 %token BCLR BCND BMCND BNOT BRA BRK BSET BSR BTST
193 | BRA EXPR
208 | BRA DOT_A EXPR
211 | BRA DOT_S EXPR
241 | BRA DOT_B EXPR
246 | BRA DOT_W EXPR
495 | BRA opt_l REG
1010 OPC(BRA),
[all...] |
| /external/mesa3d/src/gallium/drivers/nv30/ |
| nvfx_vertprog.c | 713 insn = arith(0, SCA, BRA, none.reg, 0, none, none, none);
728 insn = arith(0, SCA, BRA, none.reg, 0, none, none, none);
740 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
764 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
773 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
782 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
791 nvfx_vp_emit(vpc, arith(0, SCA, BRA, none.reg, 0, none, none, none));
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUInstrInfo.cpp | 36 || opc == SPU::BRA
|
| /external/selinux/mcstrans/share/examples/nato/setrans.d/ |
| eyes-only.conf | 103 ~c232=BRA # Brazil
|
| rel.conf | 109 ~c200,~c232=BRA # Brazil
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/ |
| MBlazeDisassembler.cpp | 170 case 0x08: return MBlaze::BRA;
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_from_tgsi.cpp | 492 NV50_IR_OPCODE_CASE(BRA, BRA);
[all...] |
| /toolchain/binutils/binutils-2.25/bfd/ |
| elf32-spu.c | 830 /* Non-zero to use bra in overlay stubs rather than br. */
833 #define BRA 0x30000000
842 bra 00110000 0..
[all...] |
